公开(公告)号：US09960278B2

公开(公告)日：2018-05-01

申请号：US13437271

申请日：2012-04-02

申请人： Yuhei Sato ,  Keiji Sato ,  Toshinari Sasaki ,  Tetsunori Maruyama ,  Atsuo Isobe ,  Tsutomu Murakawa ,  Sachiaki Tezuka

发明人： Yuhei Sato ,  Keiji Sato ,  Toshinari Sasaki ,  Tetsunori Maruyama ,  Atsuo Isobe ,  Tsutomu Murakawa ,  Sachiaki Tezuka

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L27/32 ,  H01L21/477

CPC分类号： H01L29/7869 ,  H01L21/477

摘要： To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.

公开(公告)号：US08952379B2

公开(公告)日：2015-02-10

申请号：US13608044

申请日：2012-09-10

申请人： Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromachi Godo ,  Takehisa Hatano ,  Sachiaki Tezuka ,  Suguru Hondo ,  Naoto Yamade ,  Junichi Koezuka

发明人： Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromachi Godo ,  Takehisa Hatano ,  Sachiaki Tezuka ,  Suguru Hondo ,  Naoto Yamade ,  Junichi Koezuka

IPC分类号： H01L29/78 ,  H01L29/417 ,  H01L29/786

CPC分类号： H01L29/41733 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

摘要： Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.

摘要翻译： 提供一种半导体器件，其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触，在形成布线层的区域之下。

公开(公告)号：US08410486B2

公开(公告)日：2013-04-02

申请号：US13102386

申请日：2011-05-06

申请人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi

发明人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi

IPC分类号： H01L29/10

CPC分类号： H01L29/78648 ,  C23C16/24 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： A method for manufacturing a semiconductor device having favorable electric characteristics with high productivity is provided. A first microcrystalline semiconductor film is formed over an oxide insulating film under a first condition that mixed phase grains with high crystallinity are formed at a low particle density. After that, a second microcrystalline semiconductor film is stacked over the first microcrystalline semiconductor film under a second condition that a space between the mixed phase grains are filled by the crystal growth of the mixed phase grains of the first microcrystalline semiconductor film.

摘要翻译： 提供了一种制造具有高生产率的良好电特性的半导体器件的方法。 在氧化物绝缘膜上形成第一微晶半导体膜，第一条件是以低的颗粒密度形成具有高结晶度的混相晶粒。 之后，在第一微晶半导体膜上，通过第一微晶半导体膜的混晶相的晶体生长填充混合相晶粒之间的间隔，在第一微晶半导体膜上层叠第二微晶半导体膜。

公开(公告)号：US08884297B2

公开(公告)日：2014-11-11

申请号：US13696865

申请日：2011-05-06

申请人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

发明人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

IPC分类号： H01L21/336 ,  H01L21/205 ,  H01L29/04 ,  H01L29/786 ,  H01L21/02 ,  C23C16/50 ,  C23C16/455 ,  C23C16/24 ,  H01L29/66

CPC分类号： H01L21/02513 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/50 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A manufacturing method of a microcrystalline silicon film includes the steps of forming a first microcrystalline silicon film over an insulating film by a plasma CVD method under a first condition; and forming a second microcrystalline silicon film over the first microcrystalline silicon film under a second condition. As a source gas supplied to a treatment chamber, a deposition gas containing silicon and a gas containing hydrogen are used. In the first condition, a flow rate of hydrogen is set at a flow rate 50 to 1000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 67 to 1333 Pa inclusive. In the second condition, a flow rate of hydrogen is set at a flow rate 100 to 2000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 1333 to 13332 Pa inclusive.

摘要翻译： 微晶硅膜的制造方法包括以下步骤：在第一条件下通过等离子体CVD法在绝缘膜上形成第一微晶硅膜; 以及在第二条件下在所述第一微晶硅膜上形成第二微晶硅膜。 作为供给到处理室的源气体，使用含有硅和含氢气体的沉积气体。 在第一条件下，将氢的流量设定为包含沉积气体的流量的50〜1000倍，处理室内的压力为67〜1333Pa。 在第二条件下，将氢的流量设定为包含沉积气体的流量的100〜2000倍，处理室内的压力为1333〜13332Pa。

公开(公告)号：US20130056742A1

公开(公告)日：2013-03-07

申请号：US13696865

申请日：2011-05-06

申请人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

发明人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

IPC分类号： H01L29/786 ,  H01L29/04 ,  H01L21/205 ,  H01L21/336

CPC分类号： H01L21/02513 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/50 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A manufacturing method of a microcrystalline silicon film includes the steps of forming a first microcrystalline silicon film over an insulating film by a plasma CVD method under a first condition; and forming a second microcrystalline silicon film over the first microcrystalline silicon film under a second condition. As a source gas supplied to a treatment chamber, a deposition gas containing silicon and a gas containing hydrogen are used. In the first condition, a flow rate of hydrogen is set at a flow rate 50 to 1000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 67 to 1333 Pa inclusive. In the second condition, a flow rate of hydrogen is set at a flow rate 100 to 2000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 1333 to 13332 Pa inclusive.

摘要翻译： 微晶硅膜的制造方法包括以下步骤：在第一条件下通过等离子体CVD法在绝缘膜上形成第一微晶硅膜; 以及在第二条件下在所述第一微晶硅膜上形成第二微晶硅膜。 作为供给到处理室的源气体，使用含有硅和含氢气体的沉积气体。 在第一条件下，将氢的流量设定为包含沉积气体的流量的50〜1000倍，处理室内的压力为67〜1333Pa。 在第二条件下，将氢的流量设定为包含沉积气体的流量的100〜2000倍，处理室内的压力为1333〜13332Pa。

公开(公告)号：US08513664B2

公开(公告)日：2013-08-20

申请号：US12490458

申请日：2009-06-24

申请人： Toshiyuki Isa ,  Yasuhiro Jinbo ,  Sachiaki Tezuka ,  Koji Dairiki ,  Hidekazu Miyairi ,  Shunpei Yamazaki

发明人： Toshiyuki Isa ,  Yasuhiro Jinbo ,  Sachiaki Tezuka ,  Koji Dairiki ,  Hidekazu Miyairi ,  Shunpei Yamazaki

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/00

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor includes, as a buffer layer, an amorphous semiconductor layer having nitrogen or an NH group between a gate insulating layer and source and drain regions and at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

摘要翻译： 薄膜晶体管包括作为缓冲层的至少在源极和漏极区域上具有氮或NH基的非晶半导体层，栅极绝缘层与源极和漏极区之间。 与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。 此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

公开(公告)号：US08637866B2

公开(公告)日：2014-01-28

申请号：US12490447

申请日：2009-06-24

申请人： Toshiyuki Isa ,  Yasuhiro Jinbo ,  Sachiaki Tezuka ,  Koji Dairiki ,  Hidekazu Miyairi ,  Shunpei Yamazaki ,  Takuya Hirohashi

发明人： Toshiyuki Isa ,  Yasuhiro Jinbo ,  Sachiaki Tezuka ,  Koji Dairiki ,  Hidekazu Miyairi ,  Shunpei Yamazaki ,  Takuya Hirohashi

IPC分类号： H01L29/72

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

摘要翻译： 至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。 与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。 此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

公开(公告)号：US08802493B2

公开(公告)日：2014-08-12

申请号：US13604937

申请日：2012-09-06

申请人： Junichi Koezuka ,  Shinji Ohno ,  Yuichi Sato ,  Sachiaki Tezuka ,  Tomokazu Yokoi ,  Yusuke Shino

发明人： Junichi Koezuka ,  Shinji Ohno ,  Yuichi Sato ,  Sachiaki Tezuka ,  Tomokazu Yokoi ,  Yusuke Shino

IPC分类号： H01L21/00

CPC分类号： H01L29/242 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/84 ,  H01L27/10873 ,  H01L27/1156 ,  H01L27/1203 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/7869

摘要： The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor film is subjected to nitrogen plasma treatment. Thus, part of oxygen included in the oxide semiconductor film is replaced with nitrogen, so that an oxynitride region is formed. A metal film is formed in contact with the oxynitride region. The oxynitride region has lower resistance than the other region of the oxide semiconductor film. In addition, the oxynitride region is unlikely to form high-resistance metal oxide at the interface with the contacting metal film.

摘要翻译： 氧化物半导体膜与金属膜之间的接触电阻降低。 提供了使用氧化物半导体膜并且具有优异的导通状态特性的晶体管。 提供能够进行高速运转的半导体装置。 在使用氧化物半导体膜的晶体管中，对氧化物半导体膜进行氮等离子体处理。 因此，氧化物半导体膜中包含的部分氧被氮代替，从而形成氧氮化物区。 形成与氧氮化物区域接触的金属膜。 氧氮化物区域的电阻比氧化物半导体膜的其他区域低。 此外，氧氮化物区域不可能在与接触金属膜的界面处形成高电阻金属氧化物。

公开(公告)号：US08716073B2

公开(公告)日：2014-05-06

申请号：US13547451

申请日：2012-07-12

申请人： Shunpei Yamazaki ,  Shinji Ohno ,  Yuichi Sato ,  Junichi Koezuka ,  Sachiaki Tezuka

发明人： Shunpei Yamazaki ,  Shinji Ohno ,  Yuichi Sato ,  Junichi Koezuka ,  Sachiaki Tezuka

IPC分类号： H01L21/336

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225

摘要： To provide an oxide semiconductor film including a low-resistance region, which can be applied to a transistor. To provide a transistor including the oxide semiconductor film, which can perform at high speed. To provide a high-performance semiconductor device including the transistor including the oxide semiconductor film, which can perform at high speed, with high yield. A film having a reducing property is formed over the oxide semiconductor film. Next, part of oxygen atoms are transferred from the oxide semiconductor film to the film having a reducing property. Next, an impurity is added to the oxide semiconductor film through the film having a reducing property and then, the film having a reducing property is removed, so that a low-resistance region is formed in the oxide semiconductor film.

摘要翻译： 提供一种可以应用于晶体管的包含低电阻区域的氧化物半导体膜。 提供可以高速执行的包括氧化物半导体膜的晶体管。 提供一种高性能半导体器件，其包括能够以高产率高速执行的包括氧化物半导体膜的晶体管。 在氧化物半导体膜上形成具有还原性的膜。 接下来，氧原子的一部分从氧化物半导体膜转移到具有还原性的膜。 接下来，通过具有还原性的膜向氧化物半导体膜添加杂质，然后去除具有还原性的膜，从而在氧化物半导体膜中形成低电阻区域。