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    Nonvolatile resistive memory element with an integrated oxygen isolation structure
    3.
    发明授权
    Nonvolatile resistive memory element with an integrated oxygen isolation structure 有权
    具有集成氧隔离结构的非易失性电阻式存储元件

    公开(公告)号：US08878152B2

    公开(公告)日：2014-11-04

    申请号：US13408103

    申请日：2012-02-29

    申请人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    IPC分类号： H01L29/02

    CPC分类号： H01L45/16 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

    摘要： A nonvolatile resistive memory element includes one or more novel oxygen isolation structures that protect the resistive switching material of the memory element from oxygen migration. One such oxygen isolation structure comprises an oxygen barrier layer that isolates the resistive switching material from other portions of the resistive memory device during fabrication and/or operation of the memory device. Another such oxygen isolation structure comprises a sacrificial layer that reacts with unwanted oxygen migrating toward the resistive switching material during fabrication and/or operation of the memory device.

    摘要翻译： 非易失性电阻存储元件包括一个或多个新颖的氧隔离结构，其保护存储元件的电阻开关材料免于氧迁移。 一个这样的氧隔离结构包括氧阻隔层，其在制造和/或操作存储器件期间将电阻性开关材料与电阻式存储器件的其它部分隔离。 另一种这样的氧隔离结构包括牺牲层，其在存储器件的制造和/或操作期间与向电阻开关材料迁移的不想要的氧化反应。

    Nonvolatile resistive memory element with a metal nitride containing switching layer
    6.
    发明授权
    Nonvolatile resistive memory element with a metal nitride containing switching layer 有权
    具有含有金属氮化物的开关层的非易失性电阻性存储元件

    公开(公告)号：US08853099B2

    公开(公告)日：2014-10-07

    申请号：US13328423

    申请日：2011-12-16

    申请人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Takeshi Yamaguchi

    发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Takeshi Yamaguchi

    IPC分类号： H01L21/31

    CPC分类号： H01L45/145 ,  B82Y10/00 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1608

    摘要： A nonvolatile resistive memory element has a novel variable resistance layer that includes a metal nitride, a metal oxide-nitride, a two-metal oxide-nitride, or a multilayer stack thereof. One method of forming the novel variable resistance layer comprises an interlayer deposition procedure, in which metal oxide layers are interspersed with metal nitride layers and then converted into a substantially homogeneous layer by an anneal process. Another method of forming the novel variable resistance layer comprises an intralayer deposition procedure, in which various ALD processes are sequentially interleaved to form a metal oxide-nitride layer. Alternatively, a metal oxide is deposited, nitridized, and annealed to form the variable resistance layer or a metal nitride is deposited, oxidized, and annealed to form the variable resistance layer.

    摘要翻译： 非易失性电阻存储元件具有新颖的可变电阻层，其包括金属氮化物，金属氧化物氮化物，二金属氧化物氮化物或其多层叠层。 形成新颖的可变电阻层的一种方法包括层间沉积程序，其中金属氧化物层散布有金属氮化物层，然后通过退火工艺转变成基本均匀的层。 形成新型可变电阻层的另一种方法包括层间沉积程序，其中各种ALD工艺顺序交错以形成金属氧化物 - 氮化物层。 或者，金属氧化物被沉积，氮化和退火以形成可变电阻层，或者金属氮化物被沉积，氧化和退火以形成可变电阻层。

    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH AN INTEGRATED OXYGEN ISOLATION STRUCTURE
    7.
    发明申请
    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH AN INTEGRATED OXYGEN ISOLATION STRUCTURE 有权
    具有一体化氧分离结构的非挥发性电阻记忆元件

    公开(公告)号：US20130221307A1

    公开(公告)日：2013-08-29

    申请号：US13408103

    申请日：2012-02-29

    申请人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    IPC分类号： H01L45/00

    CPC分类号： H01L45/16 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

    摘要： A nonvolatile resistive memory element includes one or more novel oxygen isolation structures that protect the resistive switching material of the memory element from oxygen migration. One such oxygen isolation structure comprises an oxygen barrier layer that isolates the resistive switching material from other portions of the resistive memory device during fabrication and/or operation of the memory device. Another such oxygen isolation structure comprises a sacrificial layer that reacts with unwanted oxygen migrating toward the resistive switching material during fabrication and/or operation of the memory device.

    摘要翻译： 非易失性电阻存储元件包括一个或多个新颖的氧隔离结构，其保护存储元件的电阻开关材料免于氧迁移。 一个这样的氧隔离结构包括氧阻隔层，其在制造和/或操作存储器件期间将电阻性开关材料与电阻式存储器件的其它部分隔离。 另一种这样的氧隔离结构包括牺牲层，其在存储器件的制造和/或操作期间与向电阻开关材料迁移的不想要的氧化反应。

    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A METAL NITRIDE CONTAINING SWITCHING LAYER
    8.
    发明申请
    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A METAL NITRIDE CONTAINING SWITCHING LAYER 有权
    带有金属氮化物的非易失性电阻记忆元件包含切换层

    公开(公告)号：US20130153845A1

    公开(公告)日：2013-06-20

    申请号：US13328423

    申请日：2011-12-16

    申请人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

    发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

    IPC分类号： H01L45/00 ,  H01L21/20 ,  B82Y10/00

    CPC分类号： H01L45/145 ,  B82Y10/00 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1608

    摘要： A nonvolatile resistive memory element has a novel variable resistance layer that includes a metal nitride, a metal oxide-nitride, a two-metal oxide-nitride, or a multilayer stack thereof. One method of forming the novel variable resistance layer comprises an interlayer deposition procedure, in which metal oxide layers are interspersed with metal nitride layers and then converted into a substantially homogeneous layer by an anneal process. Another method of forming the novel variable resistance layer comprises an intralayer deposition procedure, in which various ALD processes are sequentially interleaved to form a metal oxide-nitride layer. Alternatively, a metal oxide is deposited, nitridized, and annealed to form the variable resistance layer or a metal nitride is deposited, oxidized, and annealed to form the variable resistance layer.

    摘要翻译： 非易失性电阻存储元件具有新颖的可变电阻层，其包括金属氮化物，金属氧化物氮化物，二金属氧化物氮化物或其多层叠层。 形成新颖的可变电阻层的一种方法包括层间沉积程序，其中金属氧化物层散布有金属氮化物层，然后通过退火工艺转变成基本均匀的层。 形成新型可变电阻层的另一种方法包括层间沉积程序，其中各种ALD工艺顺序交错以形成金属氧化物 - 氮化物层。 或者，金属氧化物被沉积，氮化和退火以形成可变电阻层，或者金属氮化物被沉积，氧化和退火以形成可变电阻层。

    Methods of combinatorial processing for screening multiple samples on a semiconductor substrate
    9.
    发明授权
    Methods of combinatorial processing for screening multiple samples on a semiconductor substrate 失效
    用于在半导体衬底上筛选多个样品的组合处理方法

    公开(公告)号：US08383430B2

    公开(公告)日：2013-02-26

    申请号：US13399719

    申请日：2012-02-17

    申请人： Guarav Verma ,  Tony P. Chiang ,  Imran Hashim ,  Sandra G Malhotra ,  Prashant B Phatak ,  Kurt H Weiner

    发明人： Guarav Verma ,  Tony P. Chiang ,  Imran Hashim ,  Sandra G Malhotra ,  Prashant B Phatak ,  Kurt H Weiner

    IPC分类号： H01L21/00

    CPC分类号： G01R31/2831 ,  G01R31/2834 ,  H01L22/34

    摘要： In embodiments of the current invention, methods of combinatorial processing and a test chip for use in these methods are described. These methods and test chips enable the efficient development of materials, processes, and process sequence integration schemes for semiconductor manufacturing processes. In general, the methods simplify the processing sequence of forming devices or partially formed devices on a test chip such that the devices can be tested immediately after formation. The immediate testing allows for the high throughput testing of varied materials, processes, or process sequences on the test chip. The test chip has multiple site isolated regions where each of the regions is varied from one another and the test chip is designed to enable high throughput testing of the different regions.

    摘要翻译： 在本发明的实施例中，描述了用于这些方法的组合处理方法和测试芯片。 这些方法和测试芯片能够有效地开发用于半导体制造工艺的材料，工艺和工艺顺序集成方案。 通常，这些方法简化了在测试芯片上形成器件或部分形成的器件的处理顺序，使得器件可以在形成后立即进行测试。 即时测试允许测试芯片上各种材料，工艺或工艺顺序的高通量测试。 测试芯片具有多个位置隔离区域，其中每个区域彼此变化，并且测试芯片被设计为能够实现不同区域的高通量测试。