Laser anneal method of a semiconductor layer
    1.
    发明授权
    Laser anneal method of a semiconductor layer 有权
    半导体层的激光退火方法

    公开(公告)号:US07439114B2

    公开(公告)日:2008-10-21

    申请号:US11207458

    申请日:2005-08-18

    IPC分类号: H01L21/00

    摘要: For obtaining p-Si by irradiating a laser beam to an a-Si layer to polycrystallize, an energy level in a region to be irradiated by the laser beam is set such that a level at the rear area of the region along a scan direction of the laser beam is lower than that at the front area or the center area of the region. The energy level at the front area or the center area of the region is set such that it is substantially equal to or more than the upper limit energy level which maximizes a grain size of the p-Si obtained. Since an energy profile is set as described above, when the laser beam is scanned on the a-Si layer, an irradiated energy of the laser on the region is gradually lowered from the upper limit as the laser beam passes through, which allows the semiconductor layer to be annealed within an optimal energy level during the latter half of the annealing process.

    摘要翻译: 为了通过将激光束照射到a-Si层进行多晶化来获得p-Si,将由激光束照射的区域中的能级设定为使沿着扫描方向的区域的后部区域的电平 激光束比区域前区域或中心区域低。 该区域的前部区域或中心区域的能级被设定为使得所获得的p-Si的粒径最大化的上限能级基本上等于或大于该能级。 由于如上所述设定能量分布,当在a-Si层上扫描激光束时,该区域上的激光的照射能量随着激光束通过而从上限逐渐降低,这允许半导体 在退火过程的后半期间在最佳能级内退火的层。

    Laser anneal method of a semiconductor layer
    2.
    发明授权
    Laser anneal method of a semiconductor layer 有权
    半导体层的激光退火方法

    公开(公告)号:US07061017B2

    公开(公告)日:2006-06-13

    申请号:US10714829

    申请日:2003-11-14

    IPC分类号: H01L29/76

    摘要: For obtaining p-Si by irradiating a laser beam to an a-Si layer to polycrystallize, an energy level in a region to be irradiated by the laser beam is set such that a level at the rear area of the region along a scan direction of the laser beam is lower than that at the front area or the center area of the region. The energy level at the front area or the center area of the region is set such that it is substantially equal to or more than the upper limit energy level which maximizes a grain size of the p-Si obtained. Since an energy profile is set as described above, when the laser beam is scanned on the a-Si layer, an irradiated energy of the laser on the region is gradually lowered from the upper limit as the laser beam passes through, which allows the semiconductor layer to be annealed within an optimal energy level during the latter half of the annealing process.

    摘要翻译: 为了通过将激光束照射到a-Si层进行多晶化来获得p-Si,将由激光束照射的区域中的能级设定为使沿着扫描方向的区域的后部区域的电平 激光束比区域前区域或中心区域低。 该区域的前部区域或中心区域的能级被设定为使得所获得的p-Si的粒径最大化的上限能级基本上等于或大于该能级。 由于如上所述设定能量分布,当在a-Si层上扫描激光束时,该区域上的激光的照射能量随着激光束通过而从上限逐渐降低,这允许半导体 在退火过程的后半期间在最佳能级内退火的层。

    Laser anneal method of a semiconductor layer
    3.
    发明授权
    Laser anneal method of a semiconductor layer 失效
    半导体层的激光退火方法

    公开(公告)号:US06274414B1

    公开(公告)日:2001-08-14

    申请号:US08911505

    申请日:1997-08-14

    IPC分类号: H01L21324

    摘要: For obtaining p-Si by irradiating a laser beam to an a-Si layer to polycrystallize, an energy level in a region to be irradiated by the laser beam is set such that a level at the rear area of the region along a scan direction of the laser beam is lower than that at the front area or the center area of the region. The energy level at the front area or the center area of the region is set such that it is substantially equal to or more than the upper limit energy level which maximizes a grain size of the p-Si obtained. since an energy profile is set as described above, when the laser beam is scanned on the a-Si layer, an irradiated energy of the laser on the region is gradually lowered from the upper limit as the laser beam passes through, which allows the semiconductor layer to be annealed within an optimal energy level during the latter half of the annealing process.

    摘要翻译: 为了通过将激光束照射到a-Si层进行多晶化来获得p-Si,将由激光束照射的区域中的能级设定为使沿着扫描方向的区域的后部区域的电平 激光束比区域前区域或中心区域低。 该区域的前部区域或中心区域的能级被设定为使得所获得的p-Si的粒径最大化的上限能级基本上等于或大于该能级。 由于如上所述设定能量分布,当在a-Si层上扫描激光束时,该区域上的激光的照射能量随着激光束通过而从上限逐渐降低,这允许半导体 在退火过程的后半期间在最佳能级内退火的层。

    Semiconductor device and method of manufacturing the same comprising thin film containing low concentration of hydrogen
    5.
    发明授权
    Semiconductor device and method of manufacturing the same comprising thin film containing low concentration of hydrogen 有权
    半导体装置及其制造方法包括含有低浓度氢的薄膜

    公开(公告)号:US07045818B2

    公开(公告)日:2006-05-16

    申请号:US10818425

    申请日:2004-04-05

    IPC分类号: H01L31/20 H01L29/04 H01L21/00

    摘要: In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

    摘要翻译: 在用于TFT液晶显示系统的半导体器件的制造工艺中,在开始结晶非晶硅(a-Si)之前,进行脱氢退火以不仅降低p-Si膜中的氢的密度 (13)至5×10 20原子/ cm 3以上,同时也防止由于可能存在过剩氢气而导致的阻塞a-Si膜(13)的结晶 电影。 在用等离子体氮化物膜形式的层间绝缘膜(15)覆盖的p-Si膜(13)上,然后在氮气气氛中在350℃至400℃的温度下进行退火,一个 至3小时,更优选400℃2小时。 结果是,p-Si膜(13)中的氢原子有效地终止膜的悬挂键,因此不会变得过大,从而改善了半导体器件的电特性。

    Semiconductor device having a semiconductor thin film containing low concentration of unbound hydrogen atoms and method of manufacturing the same
    6.
    发明授权
    Semiconductor device having a semiconductor thin film containing low concentration of unbound hydrogen atoms and method of manufacturing the same 失效
    具有含有低浓度未结合氢原子的半导体薄膜的半导体器件及其制造方法

    公开(公告)号:US06750086B2

    公开(公告)日:2004-06-15

    申请号:US09049353

    申请日:1998-03-27

    IPC分类号: H01L2100

    摘要: In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

    摘要翻译: 在用于TFT液晶显示系统的半导体器件的制造工艺中,在开始结晶非晶硅(a-Si)之前,进行脱氢退火以不仅降低p-Si膜中的氢的密度 (13)〜5×10 20原子/ cm 3以下,同时也防止由于膜中剩余的氢过量而导致的阻塞a-Si膜的结晶化。 在用等离子体氮化物膜形式的层间绝缘膜(15)覆盖的p-Si膜(13)上,然后在氮气气氛中在350℃至400℃的温度下进行退火,一个 至3小时,更优选400℃2小时。 结果是,p-Si膜(13)中的氢原子有效地终止膜的悬挂键,因此不会变得过大,从而改善了半导体器件的电特性。

    Display device and manufacturing method of the same
    7.
    发明申请
    Display device and manufacturing method of the same 审中-公开
    显示装置及其制造方法相同

    公开(公告)号:US20050225253A1

    公开(公告)日:2005-10-13

    申请号:US11100613

    申请日:2005-04-07

    摘要: The invention is directed to reduction of a pattern size of a driving transistor of an emissive element and an improvement of an aperture ratio of a pixel. A second active layer of a driving TFT is formed of a two laminated polysilicon layers. The upper polysilicon layer is formed at the same time when a polysilicon layer forming a first active layer of a pixel selecting TFT is formed, and has a same thickness as that of the first active layer. Therefore, the second active layer is formed thicker by a film thickness of the lower polysilicon layer. An average crystal grain size of the second active layer is smaller than an average crystal grain size of the first active layer. Therefore, a carrier mobility of the driving TFT is lower than a carrier mobility of the pixel selecting TFT. This can shorten a channel length of the driving TFT.

    摘要翻译: 本发明旨在减少发射元件的驱动晶体管的图案尺寸和改善像素的开口率。 驱动TFT的第二有源层由两层叠多晶硅层形成。 当形成形成像素选择TFT的第一有源层的多晶硅层并且具有与第一有源层相同的厚度时,同时形成上多晶硅层。 因此,第二有源层由下部多晶硅层的膜厚形成得较厚。 第二有源层的平均晶粒尺寸小于第一有源层的平均晶粒尺寸。 因此,驱动TFT的载流子迁移率低于像素选择TFT的载流子迁移率。 这可以缩短驱动TFT的沟道长度。

    Electroluminescence display device with improved driving transistor structure
    8.
    发明授权
    Electroluminescence display device with improved driving transistor structure 有权
    具有改进的驱动晶体管结构的电致发光显示装置

    公开(公告)号:US06501448B1

    公开(公告)日:2002-12-31

    申请号:US09493893

    申请日:2000-01-28

    IPC分类号: G09G330

    摘要: An organic EL display device comprises a first TFT (30), which is a switching TFT, an organic EL element driving TFT, and an organic EL element (60) having an anode (61), a cathode (66), and an emissive element layer (65) interposed between both electrodes. The EL element driving TFT comprises a second and third TFTs (35, 40) connected in parallel. Because electrical current to the organic EL element (60) is supplied from a plurality of TFTs (35, 40), variation in the total current value can be suppressed to therefore reduce the variation in luminance, even when characteristics vary among the TFTs driving the organic EL element.

    摘要翻译: 有机EL显示装置包括作为开关TFT的第一TFT(30),有机EL元件驱动TFT和具有阳极(61),阴极(66)和发光二极管(60)的有机EL元件(60) 元件层(65)插入在两个电极之间。 EL元件驱动TFT包括并联连接的第二TFT和第三TFT(35,40)。 由于从多个TFT(35,40)供给到有机EL元件(60)的电流,因此即使当驱动TFT的TFT之间的特性变化时,也可以抑制总电流值的变化,从而降低亮度的变化 有机EL元件。

    Thin film transistor and active matrix type display unit production methods therefor
    10.
    发明授权
    Thin film transistor and active matrix type display unit production methods therefor 有权
    薄膜晶体管和有源矩阵型显示单元的生产方法

    公开(公告)号:US06995048B2

    公开(公告)日:2006-02-07

    申请号:US10333194

    申请日:2002-05-16

    IPC分类号: H01L21/00 H01L21/84

    摘要: A first contact hole is formed penetrating a gate insulating film, on which a gate electrode is formed and simultaneously a first contact is formed in the first contact hole. A second contact hole penetrating an interlayer insulating film is formed, and a second contact is formed in the second contact hole. A third contact hole is formed penetrating a planarization film, and an electrode is formed in the third contact hole. By using a plurality of contact holes for electrically connecting the electrode and a semiconductor film, the aspect ratio of each contact hole can be reduced, thereby achieving improvement in yield, high-level integration due to a reduction in difference in area between upper and bottom surfaces of the contact, and other advantageous improvements.

    摘要翻译: 穿过栅极绝缘膜的第一接触孔形成栅电极,同时在第一接触孔中形成第一接触。 形成贯穿层间绝缘膜的第二接触孔,在第二接触孔中形成第二接触。 形成穿透平坦化膜的第三接触孔,并且在第三接触孔中形成电极。 通过使用用于电连接电极和半导体膜的多个接触孔,可以减小每个接触孔的纵横比,从而实现产量的提高,由于上下面积之间的差异减小而导致的高电平整合 接触面,以及其它有利的改进。