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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20090032875A1

    公开(公告)日：2009-02-05

    申请号：US12185630

    申请日：2008-08-04

    申请人： Yusuke KAWAGUCHI ,  Kazuya Nakayama ,  Tsuyoshi Ohta ,  Takeshi Uchihara ,  Takahiro Kawano ,  Yuji Kato

    发明人： Yusuke KAWAGUCHI ,  Kazuya Nakayama ,  Tsuyoshi Ohta ,  Takeshi Uchihara ,  Takahiro Kawano ,  Yuji Kato

    IPC分类号： H01L29/00

    CPC分类号： H01L29/7813 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/7811

    摘要： There is provided a semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer of the first conductivity type; a semiconductor region of the first conductivity type selectively provided on a front surface portion of the second semiconductor layer of the second conductivity type; a first main electrode provided in contact with a surface of the semiconductor region; a second main electrode provided on a side of the first semiconductor layer of the first conductivity type, the side being opposite to the surface on which the second semiconductor layer of the second conductivity type is provided; a gate wiring provided on the second semiconductor layer of the second conductivity type around an element region in which the semiconductor region is provided; a trench penetrating the second semiconductor layer of the second conductivity type to reach the first semiconductor layer of the first conductivity type, and also extending under the element region and the gate wiring; a gate electrode provided inside the trench in the element region with a gate insulating film interposed in between; and a gate electrode lead portion provided inside the trench under the gate wiring with the gate insulating film interposed in between, and contacting the gate wiring and the gate electrode.

    摘要翻译： 提供一种半导体器件，包括：第一导电类型的第一半导体层; 设置在第一导电类型的第一半导体层上的第二导电类型的第二半导体层; 选择性地设置在第二导电类型的第二半导体层的前表面部分上的第一导电类型的半导体区域; 设置成与所述半导体区域的表面接触的第一主电极; 设置在第一导电类型的第一半导体层的一侧的第二主电极，与设置有第二导电类型的第二半导体层的表面相对的一侧; 围绕设置有半导体区域的元件区域设置在第二导电类型的第二半导体层上的栅极布线; 穿过第二导电类型的第二半导体层的沟槽到达第一导电类型的第一半导体层，并且还在元件区域和栅极布线之下延伸; 设置在所述元件区域的所述沟槽内部的栅电极，其间插入有栅极绝缘膜; 以及栅极引线部分，其设置在栅极布线下方的沟槽内部，栅极绝缘膜介于其间并与栅极布线和栅电极接触。

    POWER SEMICONDUCTOR DEVICE
    2.
    发明申请
    POWER SEMICONDUCTOR DEVICE 审中-公开
    功率半导体器件

    公开(公告)号：US20110186927A1

    公开(公告)日：2011-08-04

    申请号：US13014436

    申请日：2011-01-26

    申请人： Yusuke KAWAGUCHI ,  Takahiro Kawano

    发明人： Yusuke KAWAGUCHI ,  Takahiro Kawano

    IPC分类号： H01L29/78

    CPC分类号： H01L29/78

    摘要： According to one embodiment, a power semiconductor device includes a first insulating film and a second insulating film. The first insulating film has a first dielectric constant and is formed on a bottom surface and a side surface of a trench formed by a second semiconductor layer. The trench is in contact with a fourth semiconductor layer and extends from a surface of the fourth semiconductor layer through a third semiconductor layer to the second semiconductor layer. The second insulating film is formed on a side surface of the trench formed by the third semiconductor layer and a side surface of the trench formed by the fourth semiconductor layer, being connected to the first insulating film. The second insulating film has a second dielectric constant higher than the first dielectric constant. The gate electrode is buried in the trench via the first and second insulating films.

    摘要翻译： 根据一个实施例，功率半导体器件包括第一绝缘膜和第二绝缘膜。 第一绝缘膜具有第一介电常数，并且形成在由第二半导体层形成的沟槽的底表面和侧表面上。 沟槽与第四半导体层接触并且从第四半导体层的表面延伸穿过第三半导体层到第二半导体层。 第二绝缘膜形成在由第三半导体层形成的沟槽的侧表面和由第四半导体层形成的沟槽的侧表面上，连接到第一绝缘膜。 第二绝缘膜具有高于第一介电常数的第二介电常数。 栅电极通过第一和第二绝缘膜埋在沟槽中。

    POWER SEMICONDUCTOR DEVICE
    4.
    发明申请
    POWER SEMICONDUCTOR DEVICE 有权
    功率半导体器件

    公开(公告)号：US20100013010A1

    公开(公告)日：2010-01-21

    申请号：US12502759

    申请日：2009-07-14

    申请人： Miwako AKIYAMA ,  Yusuke KAWAGUCHI ,  Yoshihiro YAMAGUCHI

    发明人： Miwako AKIYAMA ,  Yusuke KAWAGUCHI ,  Yoshihiro YAMAGUCHI

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7813 ,  H01L29/1095 ,  H01L29/41766

    摘要： An impurity concentration profile in a vertical direction of a p type base contact layer of a power semiconductor device has a two-stage configuration. In other word, the impurity concentration profile is highest at an upper face of the p type base contact layer, has a local minimum value at a position other than the upper face and a lower face of the base contact layer, and has a local maximum value at a position lower than the position of the local minimum value.

    摘要翻译： 功率半导体器件的p型基极接触层的垂直方向的杂质浓度分布具有两级结构。 换句话说，杂质浓度分布在p型基底接触层的上表面处最高，在基底接触层的上表面和下表面以外的位置处具有局部最小值，并且具有局部最大值 在低于局部最小值的位置的位置处的值。

    POWER SEMICONDUCTOR DEVICE
    5.
    发明申请
    POWER SEMICONDUCTOR DEVICE 有权
    功率半导体器件

    公开(公告)号：US20120068248A1

    公开(公告)日：2012-03-22

    申请号：US13233993

    申请日：2011-09-15

    申请人： Yusuke KAWAGUCHI

    发明人： Yusuke KAWAGUCHI

    IPC分类号： H01L29/788 ,  H01L29/78

    CPC分类号： H01L29/7813 ,  H01L29/0626 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7805 ,  H01L29/7808

    摘要： According to one embodiment, a semiconductor device, includes an element unit including a vertical-type MOSFET, the vertical-type MOSFET in including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a fifth semiconductor layer sequentially stacked in order, an impurity concentration of the second semiconductor layer being lower than the first semiconductor layer, an insulator covering inner surfaces of a plurality of trenches, the adjacent trenches being provided with a first interval in between, and a diode unit including basically with the units of the element unit, the adjacent trenches being provided with a second interval in between, the second interval being larger than the first interval.

    摘要翻译： 根据一个实施例，半导体器件包括包括垂直型MOSFET的元件单元，包括第一半导体层的垂直型MOSFET，第二半导体层，第三半导体层，第四半导体层，第五半导体层 层，所述第二半导体层的杂质浓度低于所述第一半导体层，绝缘体覆盖多个沟槽的内表面，所述相邻沟槽之间设置有第一间隔，二极管单元包括： 基本上与元件单元的单元相邻，相邻沟槽之间设置有第二间隔，第二间隔大于第一间隔。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20110204439A1

    公开(公告)日：2011-08-25

    申请号：US13031564

    申请日：2011-02-21

    申请人： Yusuke KAWAGUCHI

    发明人： Yusuke KAWAGUCHI

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7813 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/7827

    摘要： Embodiments provide a semiconductor device including an N-type semiconductor layer 2, insulating films 4a and 4b provided on inner surfaces of trenches 3 formed on a surface of the semiconductor layer 2, first electrodes 6 each provided at a bottom part of the trench 3 and facing the semiconductor layer 2 with the insulating film 4a interposed therebetween, and second electrodes 7 each provided inside the trench 3 and above the first electrode 6. A work function of a member constituting the first electrodes 6 is smaller than a work function of a member constituting the second electrodes 7.

    摘要翻译： 实施例提供一种半导体器件，包括N型半导体层2，设置在形成在半导体层2的表面上的沟槽3的内表面上的绝缘膜4a和4b，每个设置在沟槽3的底部的第一电极6和 面对绝缘膜4a的半导体层2和分别设置在沟槽3内部和第一电极6的上方的第二电极7.构成第一电极6的构件的功函数小于构件的功函数 构成第二电极7。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20120241850A1

    公开(公告)日：2012-09-27

    申请号：US13239106

    申请日：2011-09-21

    申请人： Yusuke KAWAGUCHI

    发明人： Yusuke KAWAGUCHI

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7813 ,  H01L29/405 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66734 ,  H01L29/66787 ,  H01L29/7803

    摘要： A semiconductor device includes a drain layer, a drift region provided from a surface inside of the drain layer, a base region provided from a surface inside of the drift region, a source region provided in a trench form from a surface inside of the base region, and a gate electrode provided via a gate insulating film in a first trench. The gate electrode is extended from a part of the source region to a part of the drift region in a direction approximately parallel to a rear face of the drain layer. The semiconductor device further includes a first resistive body layer provided via a first insulating film in at least one of second trenches provided from a surface inside of the drain layer.

    摘要翻译： 半导体器件包括漏极层，从漏极层的内部设置的漂移区域，从漂移区域的内部的表面提供的基极区域，从基极区域的内部的表面形成为沟槽状的源极区域 以及经由第一沟槽中的栅极绝缘膜设置的栅电极。 栅电极从大致平行于漏极层的背面的方向从源极区域的一部分延伸到漂移区域的一部分。 半导体器件还包括经由第一绝缘膜提供的第一电阻体层，所述第一电阻体层从设置在漏极层内的表面的至少一个第二沟槽中提供。