公开(公告)号：US20140085833A1

公开(公告)日：2014-03-27

申请号：US14029735

申请日：2013-09-17

Applicant: Zhen Ding Technology Co., Ltd.

Inventor： SHIH-PING HSU ,  E-TUNG CHOU ,  CHIH-JEN HSIAO

IPC: H05K1/18 ,  H05K1/00 ,  H05K3/42 ,  H05K3/46 ,  H05K3/28

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/00 ,  H05K3/0097 ,  H05K3/281 ,  H05K3/421 ,  H05K3/4652 ,  H05K3/4682 ,  Y10T29/49162 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A chip packaging substrate includes a dielectric layer, a first inner wiring layer embedded in the dielectric layer, an outer wiring layer, and many conductive connection points. The outer wiring layer is formed at one side of the dielectric layer, and is electrically connected to the first inner wiring layer through many first conductive vias in the dielectric layer. The conductive connection points are formed at the other side of the dielectric layer, and are electrically connected to the first inner wiring layer through many second conductive vias in the dielectric layer.

Abstract translation: 芯片封装基板包括电介质层，埋在电介质层中的第一内部布线层，外部布线层以及许多导电连接点。 外部布线层形成在电介质层的一侧，并且通过电介质层中的许多第一导电通孔与第一内部布线层电连接。 导电连接点形成在电介质层的另一侧，并通过电介质层中的许多第二导电通孔与第一内部布线层电连接。

公开(公告)号：US20140027893A1

公开(公告)日：2014-01-30

申请号：US13771320

申请日：2013-02-20

Applicant: ZHEN DING TECHNOLOGY CO., LTD.

Inventor： E-TUNG CHOU ,  CHIH-JEN HSIAO

IPC: H05K1/11 ,  H01L23/495 ,  H05K1/09 ,  H01L23/00

CPC classification number: H05K1/112 ,  H01L21/48 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/4952 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/85005 ,  H01L2924/12042 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/09 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012

Abstract: A circuit board includes an insulation layer, an electrically conductive layer, and a solder mask layer. The insulation layer has a plurality of through holes passing through. The electrically conductive layer is formed on a surface of the insulation layer and covers the through holes. The electrically conductive layer has a plurality of portions exposed in the through holes to serve as a plurality of first conductive pads. The solder mask layer covers the electrically conductive layer and defines a plurality of openings to expose parts of the electrically conductive layer. Parts of the electrically conductive layer are exposed to the solder mask layer to serve as a plurality of second conductive pads. The second conductive pads are electrically connected to the first conductive pads respectively. This disclosure further relates to a chip package and a method of manufacturing the same.

Abstract translation: 电路板包括绝缘层，导电层和焊料掩模层。 绝缘层具有穿过的多个通孔。 导电层形成在绝缘层的表面上并覆盖通孔。 导电层具有暴露在通孔中的多个部分以用作多个第一导电焊盘。 焊接掩模层覆盖导电层并且限定多个开口以暴露部分导电层。 导电层的一部分暴露于焊料掩模层以用作多个第二导电焊盘。 第二导电焊盘分别电连接到第一导电焊盘。 本公开还涉及芯片封装及其制造方法。

公开(公告)号：US20140078706A1

公开(公告)日：2014-03-20

申请号：US13971854

申请日：2013-08-21

Applicant: ZHEN DING TECHNOLOGY CO., LTD.

Inventor： CHU-CHIN HU ,  SHIH-PING HSU ,  E-TUNG CHOU ,  CHIH-JEN HSIAO

IPC: H05K1/11

CPC classification number: H05K1/112 ,  H01L21/4853 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73104 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/00

Abstract: A packaging substrate includes a supporting sheet, a copper foil, a number of connecting pads, a number of solder balls, a resin layer, a wiring layer and a solder mask layer. The copper foil is attached on a surface of the supporting sheet through an adhesive sheet. The connecting pads are formed on the copper foil. The solder balls are formed on the connecting pads. The resin layer infills the gaps between the solder balls. The wiring layer is formed on the resin layer and the solder balls. Terminal portions of the solder balls facing away from the connecting pads are electrically connected to the wiring layer. The solder mask layer is formed on the wiring layer. The solder mask layer defines a number of openings exposing portions of the wiring layer. The portions of the wiring layer exposed through the openings serve as contact pads.

Abstract translation: 包装基板包括支撑片，铜箔，多个连接焊盘，多个焊球，树脂层，布线层和焊料掩模层。 铜箔通过粘合片附着在支撑片材的表面上。 连接焊盘形成在铜箔上。 焊球形成在连接焊盘上。 树脂层填充焊球之间的间隙。 布线层形成在树脂层和焊球上。 焊料球的背离连接焊盘的端子部分电连接到布线层。 在布线层上形成焊料掩模层。 焊接掩模层限定暴露部分布线层的多个开口。 通过开口露出的布线层的部分作为接触垫。