Elliptical light measuring method
    1.
    发明授权
    Elliptical light measuring method 失效
    椭圆光测量方法

    公开(公告)号:US5661560A

    公开(公告)日:1997-08-26

    申请号:US654595

    申请日:1996-05-29

    Inventor: Yoshiharu Ozaki

    CPC classification number: G03F7/7085 G01N21/956 G03F7/70566

    Abstract: In a photomask inspecting method, a photomask is inspected on the basis of the difference between the polarized state of elliptical light produced upon superposition of two linearly polarized light beams having orthogonal polarization directions and passing through two different optical paths and the polarized state of elliptical light produced when two linearly polarized light beams are superposed on each other after a target portion of a photomask is set in the optical path of one of the linearly polarized light beams. A photomask inspecting apparatus is also disclosed.

    Abstract translation: 在光掩模检查方法中,基于在具有正交偏振方向的两个线性偏振光束的叠加并通过两个不同光路并且经过两个不同光路的极化状态的椭圆光的极化状态之间的差异来检查光掩模 在将光掩模的目标部分设置在一个直线偏振光束的光路中之后,将两个线偏振光束彼此重叠产生。 还公开了一种光掩模检查装置。

    Optical fiber cable
    2.
    发明授权
    Optical fiber cable 失效
    光纤电缆

    公开(公告)号:US4966434A

    公开(公告)日:1990-10-30

    申请号:US642820

    申请日:1984-08-21

    CPC classification number: G02B6/441 G02B6/4434

    Abstract: An optical fiber cable comprising a core which comprises at least two filaments stranded, at least one optical fiber stranded around the core and a jacket around the optical fiber, wherein the strand pitch of the filaments of the core is greater than that of the optical fiber, in which the optical fiber contained is free from elongation strain when the cable is stretched.

    Abstract translation: 一种光纤电缆,其包括芯,所述芯包括至少两根绞合线,围绕所述芯线绞合的至少一根光纤和围绕所述光纤的护套,其中所述芯的线的股线间距大于所述光纤 ,其中包含的光纤在电缆被拉伸时没有伸长应变。

    Low loss and high speed diodes
    3.
    发明授权
    Low loss and high speed diodes 失效
    低损耗和高速二极管

    公开(公告)号:US4720734A

    公开(公告)日:1988-01-19

    申请号:US936949

    申请日:1986-12-01

    CPC classification number: H01L29/47 H01L21/28537 H01L29/872

    Abstract: A diode having a Schottky barrier which permits bidirectional passage of minority carriers as well as majority carriers through the provision of a bidirectional conducting Schottky electrode that substitutes for the conventional Schottky electrode used in Schottky diodes or for the low-high electrode in Pn junction diodes.

    Abstract translation: 具有肖特基势垒的二极管,通过提供替代肖特基二极管中使用的常规肖特基电极或Pn结二极管中的低电极的双向导通肖特基电极,允许少数载流子以及多数载流子双向通过。

    Multi core optical fiber
    4.
    发明授权
    Multi core optical fiber 失效
    多芯光纤

    公开(公告)号:US4653852A

    公开(公告)日:1987-03-31

    申请号:US688506

    申请日:1985-01-03

    CPC classification number: G02B6/4403

    Abstract: A multi core optical fiber made of quartz glass comprising at least two cores the centers of which are arranged substantially on one line. The distances between the centers of the adjacent cores are substantially the same in the longitudinal direction. A first cladding covers the cores and the second cladding covers the first cladding and has a larger refractive index than the first one. The fiber has improved mechanical strength and low cross-talk even if the distance between the adjacent cores is short.

    Abstract translation: 一种由石英玻璃制成的多芯光纤,其包括至少两个芯,其中心基本上在一条线上。 相邻芯的中心之间的距离在纵向方向上基本相同。 第一包层覆盖芯,并且第二包层覆盖第一包层并且具有比第一包层更大的折射率。 即使相邻芯之间的距离短,纤维也具有改善的机械强度和低的串扰。

    Semiconductor device and manufacturing process thereof
    5.
    发明授权
    Semiconductor device and manufacturing process thereof 失效
    半导体装置及其制造方法

    公开(公告)号:US4564997A

    公开(公告)日:1986-01-21

    申请号:US369235

    申请日:1982-04-16

    Abstract: A semiconductor device in which a film of an insulator a conductor is closely deposited in a groove formed in a semiconductor substrate or an insulating or conductor layer thereon to planarize the surface thereof.A semiconductor device manufacturing process in which a specimen is selectively etched away through using a resist pattern as a mask, a pattern forming film is deposited by a plasma deposition technique on the specimen, and the resist film is removed, whereby the pattern forming film closed fills up a groove formed by etching to provide a planarized surface.

    Abstract translation: 一种半导体器件,其中导体的绝缘体的膜被紧密地沉积在形成在半导体衬底或其绝缘或导体层中的沟槽中以使其表面平坦化。 通过使用抗蚀剂图案作为掩模来选择性地蚀刻出样本的半导体器件制造工艺,通过等离子体沉积技术将图案形成膜沉积在样品上,并且去除抗蚀剂膜,由此图案形成膜封闭 填充通过蚀刻形成的凹槽以提供平坦化表面。

    Integrated circuit having spare parts activated by a high-to-low
adjustable resistance device
    7.
    发明授权
    Integrated circuit having spare parts activated by a high-to-low adjustable resistance device 失效
    具有由高到低可调电阻器件激活的备件的集成电路

    公开(公告)号:US4399372A

    公开(公告)日:1983-08-16

    申请号:US213846

    申请日:1980-12-08

    Abstract: Disclosed is a semiconductor integrated circuit device comprising a semiconductor chip including a plurality of elements constituting multi-functional circuits and a control signal generating circuit incorporated within the semiconductor chip. The control signal generating circuit includes a variable resistance element which irreversibly changes its resistivity when a voltage having a magnitude larger than a specific level, is applied. The variable resistance element is connected in series with a fixed resistor which is further connected in parallel to the output electrodes of a field effect transistor. A control signal is applied to the input terminal of the transistor when the resistance of the variable resistance element is intended to change. An output terminal connected to the connection of the serial connected elements indicates logical "1" or "0" depending on whether the variable resistance element is in the high resistivity state or low resistivity state. In the semiconductor integrated circuit, the output of the control signal generating circuit is transmitted to at least one of the multi-functional circuits, so that it is activated or left deactivated.

    Abstract translation: 公开了一种包括半导体芯片的半导体集成电路器件,该半导体芯片包括构成多功能电路的多个元件和并入该半导体芯片内的控制信号发生电路。 控制信号发生电路包括可变电阻元件,其在施加具有大于特定电平的电压的电压时不可逆地改变其电阻率。 可变电阻元件与固定电阻器串联连接,该固定电阻器进一步与场效应晶体管的输出电极并联连接。 当可变电阻元件的电阻意图改变时,控制信号施加到晶体管的输入端子。 连接到串行连接元件的连接的输出端子根据可变电阻元件是处于高电阻状态还是低电阻状态而指示逻辑“1”或“0”。 在半导体集成电路中,控制信号发生电路的输出被发送到多功能电路中的至少一个,使得其被激活或停用。

    Diversity system
    8.
    发明授权
    Diversity system 失效
    多样性系统

    公开(公告)号:US4397036A

    公开(公告)日:1983-08-02

    申请号:US35538

    申请日:1979-05-03

    CPC classification number: H04B7/0865 H04B7/0837

    Abstract: A diversity system utilizing a plurality of branches has been found for an angle modulated digital signal transmission. The received signal on each branch is modulated with a local signal which has the same period as the digital signal, and satisfies the orthogonal relationship with each other. The modulated signals are combined by simply summing them, and the combined signal is differentially detected. In the case of two branches, said orthogonal local signals are .sqroot.2/T.multidot. sin (2.pi./T)t, and .sqroot.2/T.multidot. cos (2.pi./T)t, where T is the bit duration of the digital signal, and said local modulation is the amplitude modulation. The present invention can provide the same diversity effect as the prior maximal ratio combining system, although the present invention does not utilize a complicated cophasing means between each branches.

    Abstract translation: 已经发现使用多个分支的分集系统用于角度调制的数字信号传输。 每个分支上的接收信号用与数字信号具有相同周期的本地信号进行调制,并且彼此满足正交关系。 通过简单地对调制信号求和来组合调制信号,差分检测组合信号。 在两个分支的情况下,所述正交本地信号是2ROOT 2 / Tx sin(2π/ T)t和2ROOT 2 / Tx cos(2π/ T)t,其中T是数字信号的位持续时间, 并且所述局部调制是幅度调制。 本发明可以提供与现有最大比组合系统相同的分集效应,尽管本发明不利用每个分支之间的复杂的同相装置。

    D/A Conversion system with compensation circuit
    9.
    发明授权
    D/A Conversion system with compensation circuit 失效
    D / A带补偿电路的转换系统

    公开(公告)号:US4340882A

    公开(公告)日:1982-07-20

    申请号:US889559

    申请日:1978-03-23

    CPC classification number: H03M1/1047

    Abstract: A D/A conversion system with a compensation circuit comprises a D/A converter for converting a digital input signal into an analog signal and a memory for storing a compensation data used for the compensation of the output of the D/A converter at an address corresponding to the digital input signal. The digital input signal is applied to the D/A converter and a signal corresponding to the digital input signal is applied to the memory. The output of the D/A converter is adjusted on the basis of the compensation data read out from the memory.

    Abstract translation: 具有补偿电路的AD / A转换系统包括用于将数字输入信号转换为模拟信号的D / A转换器和用于存储用于补偿D / A转换器的输出的补偿数据的存储器, 到数字输入信号。 数字输入信号被施加到D / A转换器,并且对应于数字输入信号的信号被施加到存储器。 根据从存储器读出的补偿数据,调整D / A转换器的输出。

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