Dynamic divider having interlocking circuit
    1.
    发明授权
    Dynamic divider having interlocking circuit 有权
    动态分配器具有互锁电路

    公开(公告)号:US09088285B2

    公开(公告)日:2015-07-21

    申请号:US13926923

    申请日:2013-06-25

    CPC classification number: H03K21/17 H03K5/15033 H03K23/425

    Abstract: A high-speed and low power divider includes a ring of four dynamic latches, an interlocking circuit, and four output inverters. Each latch has a first dynamic node M and a second dynamic node N. The interlocking circuit is coupled to the M nodes. Based on one or more of the M node signals received, the interlocking circuit selectively controls the logic values on one or more of the M modes such that over time, as the divider is clocked, only one of the signals on the N nodes is low at a given time. The output inverters generate inverted versions of the N node signals that are output from the divider as low phase noise 25% duty cycle output signals I, IB, Q and QB. In one specific example, each latch has eight transistors and no more than eight transistors. The divider recovers quickly and automatically from erroneous state disturbances.

    Abstract translation: 高速和低功率分配器包括四个动态锁存器环,互锁电路和四个输出反相器。 每个锁存器具有第一动态节点M和第二动态节点N.互锁电路耦合到M个节点。 基于接收到的一个或多个M个节点信号,互锁电路选择性地控制M个模式中的一个或多个的逻辑值,使得随着时间的推移,当分频器被计时时,N个节点上的信号中只有一个为低 在给定的时间。 输出反相器产生从分频器输出的N个节点信号的反相版本,作为低相位噪声25%占空比输出信号I,IB,Q和QB。 在一个具体示例中,每个锁存器具有八个晶体管,不超过八个晶体管。 分离器快速自动地从错误的状态干扰中恢复。

    Circuit and method to extend a signal comparison voltage range
    2.
    发明授权
    Circuit and method to extend a signal comparison voltage range 有权
    电路和方法扩展信号比较电压范围

    公开(公告)号:US09356586B2

    公开(公告)日:2016-05-31

    申请号:US13797645

    申请日:2013-03-12

    Abstract: A circuit to a extend signal comparison voltage range includes a latching circuit and a comparator responsive to common-mode input signals. The comparator is coupled to the latching circuit and to a dynamic node. The circuit also includes a clocked boost circuit coupled to the dynamic node. The clocked boost circuit is configured to extend a supply voltage range of the comparator via biasing the dynamic node. A method to extend a signal comparison voltage range includes selectively shifting a voltage level of one of a ground reference of a dynamic circuit or a supply reference of the dynamic circuit in response to a clock signal.

    Abstract translation: 扩展信号比较电压范围的电路包括响应于共模输入信号的锁存电路和比较器。 比较器耦合到锁存电路和动态节点。 电路还包括耦合到动态节点的时钟升压电路。 时钟升压电路被配置为通过偏置动态节点来扩展比较器的电源电压范围。 扩展信号比较电压范围的方法包括响应于时钟信号选择性地移动动态电路的接地参考电压或动态电路的电源基准之一的电压电平。

    Impedance transformer for use with a quadrature passive CMOS mixer
    3.
    发明授权
    Impedance transformer for use with a quadrature passive CMOS mixer 有权
    用于正交无源CMOS混频器的阻抗变压器

    公开(公告)号:US09263990B2

    公开(公告)日:2016-02-16

    申请号:US13899108

    申请日:2013-05-21

    CPC classification number: H03D7/1491 H03D7/1466 H03D7/1483 H03D7/165 H04B1/04

    Abstract: An impedance transformer for use with a quadrature passive mixer is disclosed. In an exemplary embodiment, an apparatus includes a mixer configured to generate an up-converted signal at a mixer output port in response to local oscillator (LO) signals, and an impedance transformer configured to provide a complex impedance at the mixer output port. The complex impedance configured to generate a selected level of the reverse isolation for the mixer thereby generating a selected amplitude flatness symmetry characteristic for the up-converted signal.

    Abstract translation: 公开了一种与正交无源混频器一起使用的阻抗变压器。 在一个示例性实施例中,一种装置包括配置成响应于本地振荡器(LO)信号在混频器输出端口产生上变频信号的混频器,以及配置成在混频器输出端口处提供复阻抗的阻抗变换器。 复阻抗被配置为产生用于混频器的反向隔离的选定电平,从而为上变频信号产生选定的幅度平坦度对称特性。

    MIXER WITH CHANNEL IMPEDANCE EQUALIZATION
    5.
    发明申请
    MIXER WITH CHANNEL IMPEDANCE EQUALIZATION 有权
    混合器与通道阻抗均衡

    公开(公告)号:US20140348218A1

    公开(公告)日:2014-11-27

    申请号:US13901320

    申请日:2013-05-23

    Abstract: A passive mixer with channel impedance equalization is disclosed. In an exemplary embodiment, an apparatus includes replica devices configured to generate replica output signals and an error amplifier configured to generate bias signals based on the replica output signals. The bias signals are configured to equalize on-state channel impedances associated with a mixer.

    Abstract translation: 公开了一种具有通道阻抗均衡的无源混频器。 在示例性实施例中,一种装置包括被配置为产生副本输出信号的复制设备和配置成基于复制输出信号产生偏置信号的误差放大器。 偏置信号被配置为均衡与混频器相关联的通态阻抗。

    CIRCUIT AND METHOD TO EXTEND A SIGNAL COMPARISON VOLTAGE RANGE
    6.
    发明申请
    CIRCUIT AND METHOD TO EXTEND A SIGNAL COMPARISON VOLTAGE RANGE 有权
    扩展信号比较电压范围的电路和方法

    公开(公告)号:US20140266307A1

    公开(公告)日:2014-09-18

    申请号:US13797645

    申请日:2013-03-12

    Abstract: A circuit to a extend signal comparison voltage range includes a latching circuit and a comparator responsive to common-mode input signals. The comparator is coupled to the latching circuit and to a dynamic node. The circuit also includes a clocked boost circuit coupled to the dynamic node. The clocked boost circuit is configured to extend a supply voltage range of the comparator via biasing the dynamic node. A method to extend a signal comparison voltage range includes selectively shifting a voltage level of one of a ground reference of a dynamic circuit or a supply reference of the dynamic circuit in response to a clock signal.

    Abstract translation: 扩展信号比较电压范围的电路包括响应于共模输入信号的锁存电路和比较器。 比较器耦合到锁存电路和动态节点。 电路还包括耦合到动态节点的时钟升压电路。 时钟升压电路被配置为通过偏置动态节点来扩展比较器的电源电压范围。 扩展信号比较电压范围的方法包括响应于时钟信号选择性地移动动态电路的接地参考电压或动态电路的电源基准之一的电压电平。

    IMPEDANCE TRANSFORMER FOR USE WITH A QUADRATURE PASSIVE CMOS MIXER
    8.
    发明申请
    IMPEDANCE TRANSFORMER FOR USE WITH A QUADRATURE PASSIVE CMOS MIXER 有权
    阻抗变压器,采用四路无源CMOS混频器

    公开(公告)号:US20140347117A1

    公开(公告)日:2014-11-27

    申请号:US13899108

    申请日:2013-05-21

    CPC classification number: H03D7/1491 H03D7/1466 H03D7/1483 H03D7/165 H04B1/04

    Abstract: An impedance transformer for use with a quadrature passive mixer is disclosed. In an exemplary embodiment, an apparatus includes a mixer configured to generate an up-converted signal at a mixer output port in response to local oscillator (LO) signals, and an impedance transformer configured to provide a complex impedance at the mixer output port. The complex impedance configured to generate a selected level of the reverse isolation for the mixer thereby generating a selected amplitude flatness symmetry characteristic for the up-converted signal.

    Abstract translation: 公开了一种与正交无源混频器一起使用的阻抗变压器。 在一个示例性实施例中,一种装置包括配置成响应于本地振荡器(LO)信号在混频器输出端口产生上变频信号的混频器,以及配置成在混频器输出端口处提供复阻抗的阻抗变换器。 复阻抗被配置为产生用于混频器的反向隔离的选定电平,从而为上变频信号产生选定的幅度平坦度对称特性。

Patent Agency Ranking