公开(公告)号：WO2015147855A1

公开(公告)日：2015-10-01

申请号：PCT/US2014/032138

申请日：2014-03-28

Applicant: INTEL CORPORATION ,  KUO, Charles, C. ,  OGUZ, Kaan ,  DOYLE, Brian, S. ,  DOCZY, Mark, L. ,  KENCKE, David, L. ,  SURI, Satyarth ,  CHAU, Robert, S.

Inventor： KUO, Charles, C. ,  OGUZ, Kaan ,  DOYLE, Brian, S. ,  DOCZY, Mark, L. ,  KENCKE, David, L. ,  SURI, Satyarth ,  CHAU, Robert, S.

IPC: G11C11/16 ,  H01L29/82

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01L43/02 ,  H01L43/12

Abstract: Techniques are disclosed for fabricating a self-aligned spin-transfer torque memory (STTM) device with a dot-contacted free magnetic layer. In some embodiments, the disclosed STTM device includes a first dielectric spacer covering sidewalls of an electrically conductive hardmask layer that is patterned to provide an electronic contact for the STTM's free magnetic layer. The hardmask contact can be narrower than the free magnetic layer. The first dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer. In some embodiments, the STTM further includes an optional second dielectric spacer covering sidewalls of its free magnetic layer. The second dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer and may serve, at least in part, to protect the sidewalls of the free magnetic layer from redepositing of etch byproducts during such patterning, thereby preventing electrical shorting between the fixed magnetic layer and the free magnetic layer.

Abstract translation: 公开了用于制造具有点接触自由磁性层的自对准自旋转移转矩存储器（STTM）装置的技术。 在一些实施例中，所公开的STTM装置包括覆盖导电硬掩模层的侧壁的第一介电间隔物，其被图案化以提供用于STTM自由磁性层的电子接触。 硬掩模接触可以比自由磁性层更窄。 第一介电间隔物可用于图案化STTM的固定磁性层。 在一些实施例中，STTM还包括覆盖其自由磁性层的侧壁的可选的第二电介质间隔物。 第二电介质间隔物可以用于图案化STTM的固定磁性层，并且可以至少部分地用于保护自由磁性层的侧壁在这种图案化期间重新沉积蚀刻副产物，从而防止固定磁性层 和自由磁性层。

公开(公告)号：WO2014158178A1

公开(公告)日：2014-10-02

申请号：PCT/US2013/034506

申请日：2013-03-28

Applicant: INTEL CORPORATION

Inventor： KUO, Charles ,  OGUZ, Kaan ,  DOYLE, Brian ,  KARPOV, Elijah Ilya ,  MOJARAD, Roksana Mojarad ,  KENCKE, David ,  CHAU, Robert

IPC: G11C11/15 ,  H01L27/115 ,  H01L21/8247

CPC classification number: H01L43/10 ,  G11C11/161 ,  H01F10/3286 ,  H01F10/329 ,  H01L43/065 ,  H01L43/08 ,  H01L43/12 ,  H01L43/14

Abstract: An embodiment includes a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier between the free and fixed layers; the tunnel barrier directly contacting a first side of the free layer; and an oxide layer directly contacting a second side of the free layer; wherein the tunnel barrier includes an oxide and has a first resistance-area (RA) product and the oxide layer has a second RA product that is lower than the first RA product. The MTJ may be included in a perpendicular spin torque transfer memory. The tunnel barrier and oxide layer form a memory having high stability with an RA product not substantively higher than a less table memory having a MTJ with only a single oxide layer. Other embodiments are described herein.

Abstract translation: 实施例包括在自由层和固定层之间包括自由磁性层，固定磁性层和隧道势垒的磁隧道结（MTJ）; 所述隧道势垒直接接触所述自由层的第一侧; 和直接接触自由层的第二面的氧化物层; 其中所述隧道势垒包括氧化物并且具有第一电阻区域（RA）产物，并且所述氧化物层具有低于所述第一RA产物的第二RA产物。 MTJ可以包括在垂直旋转扭矩传递存储器中。 隧道势垒和氧化物层形成具有高稳定性的存储器，RA产物实质上高于具有仅具有单一氧化物层的MTJ的较少表存储器。 本文描述了其它实施例。

公开(公告)号：WO2013095540A1

公开(公告)日：2013-06-27

申请号：PCT/US2011/066979

申请日：2011-12-22

Applicant: INTEL CORPORATION ,  DOYLE, Brian S. ,  RAYCHOWDHURY, Arijit ,  LEE, Yong Ju ,  KUO, Charles C. ,  OGUZ, Kaan ,  KENCKE, David L. ,  CHAU, Robert S. ,  MOJARAD, Roksana Golizadeh

Inventor： DOYLE, Brian S. ,  RAYCHOWDHURY, Arijit ,  LEE, Yong Ju ,  KUO, Charles C. ,  OGUZ, Kaan ,  KENCKE, David L. ,  CHAU, Robert S. ,  MOJARAD, Roksana Golizadeh

IPC: G11C11/15 ,  H01L27/115 ,  H01L21/8247

CPC classification number: H01L43/02 ,  G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C2213/71 ,  G11C2213/78 ,  H01L27/228 ,  H01L43/08

Abstract: A magnetic memory having memory elements each with two magnetic tunneling junction (MTJ) devices is disclosed. The devices in each element are differentially programmed with complementary data. The devices for each element are stacked one above the other so that the element requires no more substrate area than a single MTJ device.

Abstract translation: 公开了具有各自具有两个磁隧道结（MTJ）装置的存储元件的磁存储器。 每个元件中的器件都用补充数据进行差分编程。 每个元件的器件彼此层叠，使得元件不需要比单个MTJ器件更多的衬底面积。

公开(公告)号：WO2013095336A1

公开(公告)日：2013-06-27

申请号：PCT/US2011/065882

申请日：2011-12-19

Applicant: INTEL CORPORATION ,  KUO, Charles C. ,  MOJARAD, Roksana Golizadeh ,  DOYLE, Brian S. ,  KENCKE, David L. ,  OGUZ, Kaan ,  CHAU, Robert S.

Inventor： KUO, Charles C. ,  MOJARAD, Roksana Golizadeh ,  DOYLE, Brian S. ,  KENCKE, David L. ,  OGUZ, Kaan ,  CHAU, Robert S.

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  H01L27/228 ,  H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: Spin transfer torque memory (STTM) devices with half-metals and methods to write and read the devices are described. For example, a magnetic tunneling junction includes a free magnetic layer, a fixed magnetic layer, and a dielectric layer disposed between the free magnetic layer and the fixed magnetic layer. One or both of the free magnetic layer and the fixed magnetic layer includes a half-metal material at an interface with the dielectric layer.

Abstract translation: 描述了具有半金属的自旋转移转矩存储器（STTM）器件以及写入和读取器件的方法。 例如，磁性隧道结包括自由磁性层，固定磁性层和设置在自由磁性层和固定磁性层之间的电介质层。 自由磁性层和固定磁性层中的一个或两个包括在与电介质层的界面处的半金属材料。

公开(公告)号：WO2019172928A1

公开(公告)日：2019-09-12

申请号：PCT/US2018/021737

申请日：2018-03-09

Applicant: INTEL CORPORATION

Inventor： O'BRIEN, Kevin ,  OGUZ, Kaan ,  KUO, Charles ,  DOCZY, Mark ,  SATO, Noriyuki

IPC: H01L43/08 ,  H01L43/02 ,  H01L43/10

Abstract: A pSTTM device includes a first electrode and a second electrode, a free magnet between the first electrode and the second electrode, a fixed magnet between the first electrode and the second electrode, a tunnel barrier between the free magnet and the fixed magnet, a coupling layer between the free magnet and the first electrode, where the coupling layer comprises a metal and oxygen and a follower between the coupling layer and the first electrode, wherein the follower comprises a magnetic skyrmion. The skyrmion follower may be either magnetically and electrically coupled to the free magnet to form a coupled system of switching magnetic layers. In an embodiment, the skyrmion follower has a weaker magnetic anisotropy than an anisotropy of the free magnet.

公开(公告)号：WO2019125388A1

公开(公告)日：2019-06-27

申请号：PCT/US2017/067106

申请日：2017-12-18

Applicant: INTEL CORPORATION

Inventor： GOSAVI, Tanay ,  MANIPATRUNI, Sasikanth ,  NIKONOV, Dmitri, E. ,  OGUZ, Kaan ,  YOUNG, Ian, A.

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/08 ,  H01L43/12

CPC classification number: H01L43/08 ,  H01L43/06 ,  H01L43/10 ,  H01L43/12 ,  H03B15/006

Abstract: An apparatus is provided which comprises: a first magnetic junction; a second magnetic junction; an interconnect adjacent to the first and second magnetic junctions; a first structure adjacent to the interconnect such that the first structure is adjacent to the first magnetic junction, wherein the first structure comprises a magnet with a first magnetization relative to a plane of a device; and a second structure adjacent to the interconnect such that the second structure is adjacent the second magnetic junction, wherein the second structure comprises a magnet with a second magnetization relative to the x-y plane of the device.

公开(公告)号：WO2019022732A1

公开(公告)日：2019-01-31

申请号：PCT/US2017/043982

申请日：2017-07-26

Applicant: INTEL CORPORATION ,  MAJHI, Prashant ,  DOYLE, Brian S. ,  KARPOV, Elijah V. ,  SHARMA, Abhishek A. ,  O'BRIEN, Kevin P. ,  OGUZ, Kaan

Inventor： MAJHI, Prashant ,  DOYLE, Brian S. ,  KARPOV, Elijah V. ,  SHARMA, Abhishek A. ,  O'BRIEN, Kevin P. ,  OGUZ, Kaan

IPC: G11C13/00 ,  H01L43/08 ,  H01L27/22

Abstract: Embedded non-volatile memory structures having bilayer selector elements are described. In an example, a memory device includes a wordline. A bilayer selector element is above the wordline. The bilayer selector element includes a ferroelectric oxide material layer. A bipolar memory element is above the wordline. A conductive electrode is between the bilayer selector element and the bipolar memory element. A bitline is above the wordline.

公开(公告)号：WO2019005164A1

公开(公告)日：2019-01-03

申请号：PCT/US2017/040507

申请日：2017-06-30

Applicant: INTEL CORPORATION ,  OGUZ, Kaan ,  O'BRIEN, Kevin P. ,  KUO, Charles C. ,  DOYLE, Brian S. ,  DOCZY, Mark L. ,  WIEGAND, Christopher J. ,  RAHMAN, Tofizur ,  OUELLETTE, Daniel G. ,  BROCKMAN, Justin S. ,  GHANI, Tahir ,  GOLONZKA, Oleg

Inventor： OGUZ, Kaan ,  O'BRIEN, Kevin P. ,  KUO, Charles C. ,  DOYLE, Brian S. ,  DOCZY, Mark L. ,  WIEGAND, Christopher J. ,  RAHMAN, Tofizur ,  OUELLETTE, Daniel G. ,  BROCKMAN, Justin S. ,  GHANI, Tahir ,  GOLONZKA, Oleg

IPC: H01L43/10 ,  H01L43/12

Abstract: A memory device includes a bottom electrode, a fixed magnet above the bottom electrode, a tunnel barrier on the fixed magnet, a free magnet on the tunnel barrier. One of the free magnet or the fixed magnet includes a magnetic alloy consisting of iron and boron, and one or more elements selected from the group consisting of Si, Ge, Al, Hf, W, Ru, Ir, Ta, Cr and Mo where the total amount of the one or more elements is less than or equal to 10 atomic percent of the total composition of the magnetic alloy. A memory device further includes an oxide layer on the free magnet, a follower magnetic layer on the oxide layer and a top electrode above the follower magnetic layer.

公开(公告)号：WO2019005128A1

公开(公告)日：2019-01-03

申请号：PCT/US2017/040405

申请日：2017-06-30

Applicant: INTEL CORPORATION

Inventor： KUO, Charles C. ,  ATANASOV, Sarah ,  DOCZY, Mark L. ,  OGUZ, Kaan ,  O'BRIEN, Kevin P.

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

CPC classification number: H01L43/08 ,  H01L43/02 ,  H01L43/12

Abstract: MTJ material stacks including one or more nano-contact, MTJ devices employing such stacks, and computing platforms employing such MTJ devices. Nano-contacts having lateral dimensions smaller than the lateral dimensions of a free magnet layer may convey a high current density into the free magnetic layer at their point(s) of contact during device operation. With such an architecture lower write currents and/or reduced switching times may be achieved for an MTJ device having a given free magnet area (footprint). A nano- contact may be fabricated with a spacer-based multi-patterning technique.

公开(公告)号：WO2019005083A1

公开(公告)日：2019-01-03

申请号：PCT/US2017/040137

申请日：2017-06-29

Applicant: INTEL CORPORATION

Inventor： KUO, Charles C. ,  CHAUDHRY, Anurag ,  OGUZ, Kaan

IPC: H01L43/10 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

CPC classification number: H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: MTJ material stacks including a carbon-doped filter layer, MTJ devices employing such material stacks, and computing platforms employing such MTJ devices. A composite fixed magnet structure may include one or more ferromagnetic material layer having a first crystallinity that is separated from another layer having a second crystallinity by a carbon-doped filter layer. A carbon-doped filter layer may be amorphous as-deposited and have a higher crystallization temperature than that of the ferromagnetic material layer and/or another polycrystalline layer, such as a synthetic antiferromagnet (SAF) structure. Desirable crystallinity within a ferromagnetic material layer and/or SAF structure may be promoted by a carbon-doped filter layer.