公开(公告)号：WO02065547A3

公开(公告)日：2003-06-26

申请号：PCT/US0202311

申请日：2002-01-25

Applicant: APPLIED MATERIALS INC

Inventor： SUNDARRAJAN ARVIND ,  RENGARAJAN SURAJ ,  MILLER MICHAEL A ,  DING PEIJUN ,  YAO GONGDA ,  MARCADAL CHRISTOPHE ,  CHEN LING

IPC: C23C14/02 ,  C23C14/16 ,  C23C16/34 ,  H01L21/285 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76846 ,  C23C14/024 ,  C23C14/16 ,  C23C16/34 ,  H01L21/2855 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided herein is a method of depositing alpha-tantalum film on a semiconductor wafer by depositing a tantalum nitride film on a wafer; and then depositing a tantalum film over the tantalum nitride film using wafer bias. The tantalum film as deposited is in alpha phase. Also provided is a method of depositing Cu barrier and seed layer on a semiconductor wafer, comprising the steps of depositing a tantalum nitride layer on a wafer; depositing a tantalum layer over the tantalum nitride layer using wafer bias, wherein the resulting tantalum barrier layer is in alpha phase; and then depositing Cu seed layer over the alpha-tantalum barrier layer. Further provided is a method of depositing alpha-tantalum film/layer using two-chamber process, wherein the tantalum nitride and subsequently deposited tantalum films/layers can be deposited in two separate chambers, such as IMP or SIP chambers. Still further provided is a method of depositing alpha-tantalum film by depositing PVD tantalum film on CVD films.

Abstract translation: 本文提供了一种通过在晶片上沉积氮化钽膜在半导体晶片上沉积α-钽膜的方法; 然后使用晶片偏压在钽氮化物膜上沉积钽膜。 沉积的钽膜是α相。 还提供了一种在半导体晶片上沉积Cu势垒和种子层的方法，包括以下步骤：在晶片上沉积氮化钽层; 使用晶片偏置在钽氮化物层上沉积钽层，其中所得的钽阻挡层是α相; 然后在α-钽阻挡层上沉积Cu籽晶层。 进一步提供了一种使用二室工艺沉积α-钽膜/层的方法，其中氮化钽和随后沉积的钽膜/层可以沉积在两个分离的室中，例如IMP或SIP室。 还提供了通过在CVD膜上沉积PVD钽膜来沉积α-钽膜的方法。

公开(公告)号：WO0239500A3

公开(公告)日：2004-02-19

申请号：PCT/US0145167

申请日：2001-11-01

Applicant: APPLIED MATERIALS INC

Inventor： CHEN LING ,  GANGULI SESHADRI ,  CAO WEI ,  MARCADAL CHRISTOPHE

IPC: H01L21/285 ,  H01L21/4763 ,  H01L21/768

CPC classification number: H01L21/76844 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76865

Abstract: A method and resultant structure of forming barrier layers in a via hole extending through an inter-level dielectric layer. A first barrier layer (30) of TiSin is conformally coated by chemical vapor deposition onto the bottom and sidewalls of the via holes and in the field are on top of the dielectric layer. A single plasma sputter reactor is used to perform two steps. In the first step, the wafer rather than the target is sputtered with high energy ions to remove the barrier layer (30) from the bottom of the via but not from the sidewalls. In the second step, a second barrier layer (40), for example of Ta/TaN, is sputter deposited onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls. Chamber conditions in the first step, including balancing neutrals and ions, may be controlled to remove the first barrier layer from the via bottom while leaving it on the more exposed the field area.

Abstract translation: 在延伸穿过层间电介质层的通孔中形成势垒层的方法和结果。 TiSin的第一阻挡层（30）通过化学气相沉积保形地涂覆到通孔的底部和侧壁上，并且在场中位于介电层的顶部。 使用单个等离子体溅射反应器执行两个步骤。 在第一步骤中，用高能离子溅射晶片而不是靶，以从通孔的底部除去阻挡层（30），而不是从侧壁去除。 在第二步骤中，例如Ta / TaN的第二阻挡层（40）溅射沉积到通孔底部和侧壁上。 这两个步骤可以通过施加到靶，通过室压力或通过晶片偏置的功率来区分。 第二步骤可以包括从通孔底部同时移除第一阻挡层并将第二阻挡层溅射到通孔侧壁上。 可以控制第一步骤中的室内条件，包括平衡中性粒子和离子，以将第一阻挡层从通孔底部移除，同时将其留在更暴露的场区域。

公开(公告)号：WO03035927A3

公开(公告)日：2003-07-31

申请号：PCT/US0234553

申请日：2002-10-25

Applicant: APPLIED MATERIALS INC

Inventor： CHEN LING ,  KU VINCENT ,  WU DIEN-YEH ,  CHUNG HUA ,  OUYE ALAN ,  NAKASHIMA NORMAN ,  CHANG MEI

IPC: C23C16/44 ,  C23C16/455 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/76843 ,  C23C16/4411 ,  C23C16/45504 ,  C23C16/45508 ,  C23C16/45512 ,  C23C16/45544 ,  C23C16/45563 ,  C23C16/45582 ,  H01L21/28562

Abstract: An apparatus and method for performing a cyclical layer deposition process, such as atomic layer deposition is provided. In one aspect, the apparatus includes a substrate support having a substrate receiving surface, and a chamber lid comprising a tapered passageway extending from a central portion of the chamber lid and a bottom surface extending from the passageway to a peripheral portion of the chamber lid, the bottom surface shaped and sized to substantially cover the substrate receiving surface. The apparatus also includes one or more valves coupled to the gradually expanding channel, and one or more gas sources coupled to each valve.

Abstract translation: 提供了一种用于执行诸如原子层沉积的循环层沉积工艺的装置和方法。 一方面，该装置包括具有基板接收表面的基板支撑件和包括从腔室盖的中心部分延伸的锥形通道和从通道延伸到腔室盖的周边部分的底面的腔室盖， 所述底表面的形状和尺寸基本上覆盖所述基板接收表面。 该装置还包括联接到逐渐扩大的通道的一个或多个阀以及联接到每个阀的一个或多个气体源。

公开(公告)号：WO02079537A3

公开(公告)日：2002-12-19

申请号：PCT/US0209311

申请日：2002-03-25

Applicant: APPLIED MATERIALS INC

Inventor： JIAN PING ,  GANGULI SESHADRI ,  LITTAU KARL A ,  MARCADAL CHRISTOPHE ,  CHEN LING

IPC: C23C16/02 ,  C23C16/16 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/52

CPC classification number: C23C16/0281 ,  C23C16/16 ,  H01L21/28556

Abstract: In accordance with the present invention, a method is provided for forming an improved tungsten layer. In one embodiment, a CVD method for depositing a tungsten layer on a substrate includes forming a bilayer of titanium-nitride/titanium (TiN/Ti) over the substrate, placing the substrate in a deposition zone of a substrate processing chamber, and introducing a fluorine-free tungsten-containing precursor and a carrier gas into the deposition zone for forming a tungsten nucleation layer over the TiN/Ti bilayer. The Ti layer is between the TiN layer and the substrate. After the tungsten nucleation formation, a process gas including a tungsten-containing source and a reduction agent are introduced into the deposition zone for forming the bulk tungsten layer. In one embodiment, the fluorine-free tungsten-containing precursor includes W(CO)6, and the carrier gas is Argon.

Abstract translation: 根据本发明，提供了一种用于形成改进的钨层的方法。 在一个实施例中，用于在衬底上沉积钨层的CVD方法包括在衬底上形成氮化钛/钛（TiN / Ti）双层，将衬底放置在衬底处理室的沉积区中， 无氟含钨前体和载气进入沉积区，以在TiN / Ti双层上形成钨成核层。 Ti层位于TiN层和衬底之间。 在钨成核形成之后，包括含钨源和还原剂的工艺气体被引入用于形成块钨层的沉积区中。 在一个实施例中，无氟含钨前体包括W（CO）6，载气是氩。

公开(公告)号：WO2004064147A3

公开(公告)日：2004-09-02

申请号：PCT/US0340857

申请日：2003-12-19

Applicant: APPLIED MATERIALS INC

Inventor： CHUNG HUA ,  BEKIARIS NIKOLAOS ,  MARCADAL CHRISTOPHE ,  CHEN LING

IPC: C23C16/34 ,  H01B13/00 ,  H01L21/285 ,  H01L21/306 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L21/76843 ,  C23C16/34 ,  H01L21/02063 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/76814 ,  H01L21/76838 ,  H01L21/76873 ,  H01L21/76876

Abstract: A method for processing substrates is provided. The method includes depositing and etching a low k dielectric layer on a substrate, pre-cleaning the substrate with a plasma, and depositing a barrier layer on the substrate. Pre-cleaning the substrate minimizes the diffusion of the barrier layer into the low k dielectric layer and/or enhances the deposition of the barrier layer.

Abstract translation: 提供了一种处理衬底的方法。 该方法包括沉积和蚀刻基底上的低k电介质层，用等离子体预清洁衬底，以及在衬底上沉积阻挡层。 预清洁衬底使阻挡层向低k电介质层的扩散最小化和/或增强阻挡层的沉积。

公开(公告)号：WO2004053947A3

公开(公告)日：2004-08-12

申请号：PCT/US0319813

申请日：2003-06-23

Applicant: APPLIED MATERIALS INC

Inventor： MARCADAL CHRISTOPHE ,  CHEN LING

IPC: C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/76843 ,  C23C16/34 ,  C23C16/45531 ,  H01L21/28562 ,  H01L21/76846 ,  Y10T428/24926

Abstract: Methods and an apparatus of forming a titanium silicon nitride (TiSiN) layer are disclosed. The titanium silicon nitride (TiSiN) layer may be formed using a cyclical deposition process by alternately adsorbing a titanium-containing precursor, a silicon-containing gas and a nitrogen-containing gas on a substrate. The titanium-containing precursor, the silicon-containing gas and the nitrogen-containing gas react to form the titanium silicon nitride (TiSiN) layer on the substrate. The formation of the titanium silicon nitride (TiSiN) layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, a titanium silicon nitride (TiSiN) layer may be used as a diffusion barrier for a copper metallization process.

Abstract translation: 公开了形成氮化硅钛（TiSiN）层的方法和装置。 可以通过在基板上交替吸附含钛前体，含硅气体和含氮气体的循环沉积工艺来形成氮化钛（TiSiN）层。 含钛前体，含硅气体和含氮气体反应以在衬底上形成氮化钛（TiSiN）层。 氮化钛（TiSiN）层的形成与集成电路制造工艺兼容。 在一个集成电路制造工艺中，可以使用氮化硅钛（TiSiN）层作为铜金属化工艺的扩散阻挡层。

公开(公告)号：WO03028090A3

公开(公告)日：2003-09-12

申请号：PCT/US0228715

申请日：2002-09-09

Applicant: APPLIED MATERIALS INC

Inventor： CHUNG HUA ,  CHEN LING ,  YU JICK ,  CHANG MEI

IPC: C23C14/06 ,  C23C30/00 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52

CPC classification number: C23C14/06 ,  C23C30/00 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention generally relates to filling of a feature by depositing a barrier layer (1204), depositing a seed layer (1502) over the barrier layer, and depositing a conductive layer over the seed layer. In one embodiment, the seed layer comprises a copper alloy seed layer deposited over the barrier layer. For example, the copper alloy seed layer may comprise copper and a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. In another embodiment, the seed layer comprises a copper alloy seed layer (1512) deposited over the barrier layer and a second seed layer (1514) deposited over the copper alloy seed layer. The copper alloy seed layer may comprise copper and a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof The second seed layer may comprise a metal, such as undoped copper. In still another embodiment, the seed layer comprises a first seed layer and a second seed layer. The first seed layer may comprise a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. The second seed layer may comprise a metal, such as undoped copper.

Abstract translation: 本发明一般涉及通过在阻挡层上沉积阻挡层（1204），沉积种子层（1502）以及在种子层上沉积导电层来填充特征。 在一个实施例中，种子层包括沉积在阻挡层上的铜合金种子层。 例如，铜合金种子层可以包括铜和金属，例如铝，镁，钛，锆，锡及其组合。 在另一个实施方案中，种子层包括沉积在阻挡层上的铜合金晶种层（1512）和沉积在铜合金晶种层上的第二晶种层（1514）。 铜合金种子层可以包括铜和金属，例如铝，镁，钛，锆，锡及其组合。第二种子层可以包括金属，例如未掺杂的铜。 在另一个实施例中，种子层包括第一种子层和第二种子层。 第一种子层可以包括金属，例如铝，镁，钛，锆，锡及其组合。 第二种子层可以包括金属，例如未掺杂的铜。

公开(公告)号：WO03044242A3

公开(公告)日：2003-09-18

申请号：PCT/US0236713

申请日：2002-11-15

Applicant: APPLIED MATERIALS INC

Inventor： CHEN LING ,  CHANG MEI

IPC: C23C16/18 ,  C23C16/44 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/76877 ,  C23C16/18 ,  C23C16/4402 ,  C23C16/45553 ,  H01L21/28562 ,  H01L21/7681 ,  Y10S438/905

Abstract: Methods of forming copper films by sequentially introducing and then reacting nitrogen containing analogs of Copper II ss-diketonates which analogs are more stable source reagents for copper deposition. The nitrogen containing analogs replace -O- with -N(R")- wherein R" is an alkyl group having from one to four carbon atoms. Replacement of each -O- is preferred although replacement of one -O- per cyclic ring is sufficient to improve stability of the copper source reagents. The source reagent can be purified by sublimation to remove solvents and excess ligands prior to semiconductor processing. The processing chamber is preferably a cyclical deposition chamber maintained at a pressure of less than about 10 Torr and the substrate is maintained at a temperature of about 50 to about 200 DEG C.

Abstract translation: 通过依次引入并随后反应含铜的类似物II-β-二酮酸铜来形成铜膜的方法，所述类似物是用于铜沉积的更稳定的源试剂。 含氮类似物用-N（R“） - 代替-O-，其中R”是具有1至4个碳原子的烷基。 每个-O-置换是优选的，尽管每个环的一个-O-的置换足以改善铜源试剂的稳定性。 源试剂可以在半导体处理之前通过升华纯化以除去溶剂和过量的配体。 处理室优选是保持在小于约10Torr的压力下的循环沉积室，并且衬底保持在约50至约200℃的温度下。

公开(公告)号：WO0212589A3

公开(公告)日：2002-07-11

申请号：PCT/US0124880

申请日：2001-08-08

Applicant: APPLIED MATERIALS INC

Inventor： CHEN LING ,  MARCADAL CHRISTOPHE

IPC: C23C16/34 ,  C23C28/00 ,  C23C28/02 ,  H01L21/285 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76846 ,  C23C16/34 ,  C23C28/322 ,  C23C28/34 ,  H01L21/28568 ,  H01L21/76873 ,  H01L21/76874 ,  H01L2221/1089

Abstract: A barrier layer structure and a method of forming the structure. The barrier layer structure comprises a bilayer, with a first layer formed by chemical vapor deposition and a second layer formed by physical deposition. The first barrier layer comprises a metal or a metal nitride and the second barrier layer comprises a metal or a metal nitride. The barrier bilayer is applicable to copper metallization.

Abstract translation: 阻挡层结构和形成该结构的方法。 阻挡层结构包括双层，具有通过化学气相沉积形成的第一层和通过物理沉积形成的第二层。 第一阻挡层包含金属或金属氮化物，第二阻挡层包含金属或金属氮化物。 阻隔双层适用于铜金属化。

公开(公告)号：WO9963590A9

公开(公告)日：2000-05-25

申请号：PCT/US9911272

申请日：1999-05-21

Applicant: APPLIED MATERIALS INC

Inventor： BHAN MOHAN K ,  CHEN LING ,  ZHENG BO ,  JONES JUSTIN ,  GANGULI SESHADRI ,  LEVINE TIMOTHY ,  WILSON SAMUEL ,  CHANG MEI

IPC: C23C16/18 ,  C23C16/56 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52

CPC classification number: H01L21/76862 ,  C23C16/18 ,  C23C16/56 ,  H01L21/76843 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76876 ,  H01L21/76886

Abstract: A method for reducing the resistivity of a copper layer on a wafer. A moisture containing seed layer of copper is formed over a layer of material on a wafer. The copper seed layer is treated by either heat or ions from a plasma to anneal out moisture thereby reducing its resistivity and improving its adhesion to the underlying layer. A moisture free copper layer is then deposited on top of the "clean" or treated copper seed layer.

Abstract translation: 一种降低晶片上铜层电阻率的方法。 在晶片上的一层材料上形成含水分的铜种籽层。 铜种子层通过来自等离子体的热或离子来处理以退出水分，从而降低其电阻率并改善其与下层的粘附性。 然后将无水分的铜层沉积在“干净”或处理的铜籽晶层的顶部。