公开(公告)号：WO2018004804A1

公开(公告)日：2018-01-04

申请号：PCT/US2017/029363

申请日：2017-04-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： SHARANGPANI, Rahul ,  MAKALA, Raghuveer S. ,  SHUKLA, Keerti ,  ZHOU, Fei ,  PERI, Somesh ,  AMANO, Fumitaka

IPC: H01L21/28 ,  H01L29/792 ,  H01L27/11582

CPC classification number: H01L27/11556 ,  H01L21/76847 ,  H01L23/53266 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/40117 ,  H01L29/7926

Abstract: Memory stack structures are formed through an alternating stack of insulating layers and sacrificial material layers. Backside recesses are formed by removal of the sacrificial material layers selective to the insulating layers and the memory stack structures. A barrier layer stack including a crystalline electrically conductive barrier layer and an amorphous barrier layer is formed in the backside recesses prior to formation of a metal fill material layer.

Abstract translation: 通过交替堆叠的绝缘层和牺牲材料层形成存储器堆叠结构。 通过去除对绝缘层和存储器堆叠结构有选择性的牺牲材料层来形成后侧凹槽。 在形成金属填充材料层之前，在后侧凹槽中形成包括晶体导电阻挡层和非晶态阻挡层的阻挡层叠层。

公开(公告)号：WO2017165027A1

公开(公告)日：2017-09-28

申请号：PCT/US2017/018211

申请日：2017-02-16

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： SHARANGPANI, Rahul ,  MAKALA, Raghuveer S. ,  KANAKAMEDALA, Senaka ,  ZHOU, Fei ,  PERI, Somesh ,  TSUTSUMI, Masanori ,  SHUKLA, Keerti ,  IKAWA, Yusuke ,  SAKAKIBARA, Kyohiko ,  TAKII, Eisuke

IPC: H01L29/66 ,  H01L29/788 ,  H01L29/792 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582

CPC classification number: H01L27/11582 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/02326 ,  H01L21/31111 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11573 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926

Abstract: A memory opening can be formed through an alternating stack of insulating layers and sacrificial material layers provided over a substrate. Annular etch stop material portions are provided at each level of the sacrificial material layers around the memory opening. The annular etch stop material portions can be formed by conversion of surface portions of the sacrificial material layers into dielectric material portion, or by recessing the sacrificial material layers around the memory opening and filling indentations around the memory opening. After formation of a memory stack structure, the sacrificial material layers are removed from the backside. The annular etch stop material portions are at least partially converted to form charge trapping material portions. Vertical isolation of the charge trapping material portions among one another around the memory stack structure minimizes leakage between the charge trapping material portions located at different word line levels.

Abstract translation: 存储器开口可以通过设置在衬底上的绝缘层和牺牲材料层的交替堆叠来形成。 环形蚀刻停止材料部分设置在存储器开口周围的牺牲材料层的每一层处。 环形蚀刻停止材料部分可通过将牺牲材料层的表面部分转换成电介质材料部分或通过围绕存储器开口凹陷牺牲材料层并在记忆开口周围填充凹痕来形成。 在形成存储器堆叠结构之后，从背面去除牺牲材料层。 环形蚀刻停止材料部分至少部分地被转换以形成电荷捕捉材料部分。 在存储器堆叠结构周围彼此垂直隔开电荷捕捉材料部分使得位于不同字线水平的电​​荷捕捉材料部分之间的泄漏最小化。

公开(公告)号：WO2017074552A1

公开(公告)日：2017-05-04

申请号：PCT/US2016/049496

申请日：2016-08-30

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： SHARANGPANI, Rahul ,  SHUKLA, Keerti ,  MAKALA, Raghuveer S. ,  PERI, Somesh ,  LEE, Yao-Sheng

IPC: H01L27/115 ,  H01L21/285

CPC classification number: H01L21/443 ,  H01L21/28556 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/441 ,  H01L21/76871 ,  H01L27/0688 ,  H01L27/1052 ,  H01L27/108 ,  H01L27/10844 ,  H01L27/11534 ,  H01L27/11556 ,  H01L27/11563 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L29/495 ,  H01L29/4975

Abstract: A silicon-containing nucleation layer can be employed to provide a self-aligned template for selective deposition of tungsten within backside recesses during formation of a three-dimensional memory device. The silicon-containing nucleation layer may remain as a silicon layer, converted into a tungsten silicide layer, or replaced with a tungsten nucleation layer. Tungsten deposition can proceed only on the surface of the silicon-containing nucleation layer or a layer derived therefrom in a subsequent tungsten deposition process.

Abstract translation: 可以使用含硅成核层来提供自对准模板，用于在形成三维存储器装置期间在后侧凹槽内选择性沉积钨。 含硅成核层可以保持为硅层，转化成硅化钨层或用钨成核层代替。 钨沉积可以在随后的钨沉积工艺中仅在含硅成核层的表面或由其衍生的层上进行。