公开(公告)号：EP3228583A4

公开(公告)日：2018-07-25

申请号：EP15866031

申请日：2015-08-20

Applicant: CSMC TECHNOLOGIES FAB1 CO LTD

Inventor： JING ERRONG

IPC: B81B7/02 ,  B81C1/00 ,  G01J5/02 ,  G01J5/08

CPC classification number: B81B7/02 ,  B81B2201/0278 ,  B81B2203/0118 ,  B81C1/00 ,  B81C1/0015 ,  B81C2201/0197 ,  G01J1/04 ,  G01J1/42 ,  G01J5/024 ,  G01J5/0853

Abstract: A method for manufacturing a MEMS double-layer suspension microstructure comprises steps of: forming a first film body (310) on a substrate (100), and a cantilever beam (320) connected to the substrate (100) and the first film body (310); forming a sacrificial layer (400) on the first film body (310) and the cantilever beam (320); patterning the sacrificial layer (400) located on the first film body (310) to manufacture a recessed portion (410) used for forming a support structure (520), the bottom of the recessed portion (410) being exposed of the first film body (310); depositing a dielectric layer (500) on the sacrificial layer (400); patterning the dielectric layer (500) to manufacture a second film body (510) and the support structure (520), the support structure (520) being connected to the first film body (310) and the second film body (510); and removing the sacrificial layer (400) to obtain the MEMS double-layer suspension microstructure.

公开(公告)号：EP2259997B1

公开(公告)日：2011-06-01

申请号：EP08848955.4

申请日：2008-11-12

Applicant: Nivarox-FAR S.A.

Inventor： FIACCABRINO, Jean-Charles ,  VERARDO, Marco ,  CONUS, Thierry ,  THIÉBAUD, Jean-Philippe ,  PETERS, Jean-Bernard

IPC: B81C99/00 ,  C25D1/00 ,  G04B13/00

CPC classification number: F16H55/06 ,  B81B2201/035 ,  B81C99/0095 ,  B81C2201/0197 ,  C25D1/08 ,  C25D5/02 ,  C25D5/10 ,  G04B13/02 ,  G04B13/022 ,  G04B19/042 ,  Y10T74/1987

Abstract: The invention relates to a method (1) for producing a silicon-metal composite micromechanical part, combining DRIE-type and LIGA-type processes. The invention also relates to a micromechanical part (51) comprising a layer containing a silicon part (53) and a metal part (41) in such a way as to form a composite-type micromechanical part (51). The invention can be used in the field of timekeeping movements.

公开(公告)号：EP2060534A1

公开(公告)日：2009-05-20

申请号：EP07120883.9

申请日：2007-11-16

Applicant: Nivarox-FAR S.A.

Inventor： Fiaccabrino, Jean-Charles ,  Verardo, Marco ,  Conus, Thierry ,  Thiébaud, Jean-Philippe ,  Peters, Jean-Bernard

IPC: B81C5/00 ,  C25D1/00 ,  G04B13/00

CPC classification number: F16H55/06 ,  B81B2201/035 ,  B81C99/0095 ,  B81C2201/0197 ,  C25D1/08 ,  C25D5/02 ,  C25D5/10 ,  G04B13/02 ,  G04B13/022 ,  G04B19/042 ,  Y10T74/1987

Abstract: L'invention se rapporte à un procédé de fabrication (1) d'une pièce de micromécanique (51) composite silicium - métal combinant des processus du type DRIE et LIGA.
L'invention se rapporte également à une pièce de micromécanique (51) comprenant une couche dans laquelle une partie (53) est en silicium et une autre (41) en métal afin de former une pièce de micromécanique (51) du type composite.
L'invention concerne le domaine des mouvements horlogers.

Abstract translation: 由硅/金属复合物的用于制造微机械部件的制造方法，在上层（5）的基材包括选择性地雕刻的腔体的（3），以限定所述部件的硅部分（53）的图案，雕刻的空腔 在与基板的中间层（9）中，从腔体的部分中生长的金属层（37，45），以形成从衬底沿部件的厚度的金属部分，以及去除硅/金属复合材料的微机械部件 ， 中间层的上层和下硅层（7）之间延伸。 由硅/金属复合物的用于制造微机械部件的制造方法，在上层（5）的基材包括选择性地雕刻的腔体的（3），以限定所述部件的硅部分（53）的图案，雕刻的空腔 在与基板的中间层（9）中，从腔体的部分中生长的金属层（37，45），以形成从衬底沿部件的厚度的金属部分，以及去除硅/金属复合材料的微机械部件 ， 中间层的上层和基板的下硅层（7）之间延伸。 该金属层是由光敏树脂覆盖所述基板的顶部显影，选择性地执行光刻工艺在感光树脂雅丁到所述金属部件的预定图案，将金属在下部的硅的上部导电性表面层中 通过电镀工艺，以及从基板上的照片结构的树脂层。 下层的上表面是由通过掺杂底层和/或通过在上表面上放置一个导电层导电。 光结构的树脂使得在基片的上层凸起通过电镀继续一个层的生长和制备硅部分上方的微机械部件的第二金属部件。 基板的上侧，以在相同的照片结构的树脂的上端的高度的金属层的级别进行，在形成金属层之后。 空腔设置在基片的下层刻，以形成微机械部件gemäß的第二硅部分，以规定的形状和厚度，从衬底去除硅/金属复合微机械器件之前。 一个独立的claimsoft包括用于由硅/金属复合物的微机械结构。

公开(公告)号：EP1711961A4

公开(公告)日：2008-10-22

申请号：EP05704921

申请日：2005-01-03

Applicant: MICROFABRICA INC

Inventor： KUMAR ANANDA H ,  COHEN ADAM L ,  LOCKARD MICHAEL S

IPC: C25D1/00 ,  B05D1/38 ,  B24B49/00 ,  B81C1/00 ,  C08K3/00 ,  C25D3/30 ,  C25D3/38 ,  C25D3/48 ,  C25D5/02 ,  C25D5/10 ,  C25D15/02 ,  C25D21/12 ,  G01B5/06 ,  G01B5/28 ,  H01L21/288 ,  H01L21/301 ,  H01L21/302 ,  H01L21/3105 ,  H01L21/4763 ,  H01L21/768

CPC classification number: C25D5/48 ,  B33Y10/00 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885 ,  Y10T156/1052

Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (98) (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture (292, 294, 296, 298) that ensures precise heights of deposited materials relative to an initial surface of a substrate (82), relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine (408).

Abstract translation: 本发明的一些实施例中用于制造电化学多层结构（E. G.尺度或微米结构）具有改进的终点检测和并行维护材料（E. G.层）没有被在电化学制造工艺平坦化提供的方法和装置。 一些方法涉及平整过程中使用夹具确实保证没有材料的平坦化面给定的公差范围内平行于其他存放图。 一些方法涉及使用终点检测器具的那样沉积的材料相对的保证了精确的高度，以一个基底，相对于第一沉积层，或相对于在制造过程中形成的一些其他层的初始表面上。 在一些实施例中的平坦化可以通过研磨而其它实施例可以使用金刚石飞切机好发。

公开(公告)号：EP1869528A1

公开(公告)日：2007-12-26

申请号：EP05845202.0

申请日：2005-11-18

Applicant: Touchdown Technologies, Inc.

Inventor： TANG, Weilong ,  HSU, Tseng-Yeng ,  ISMAIL, Salleh ,  TEA, Nim, Hak ,  KHOO, Melvin, B. ,  GARABEDIAN, Raffi ,  NAMBURI, Lakshmikanth

IPC: G03F7/00

CPC classification number: B81C1/00436 ,  B81C1/00666 ,  B81C2201/0107 ,  B81C2201/0197

Abstract: The present invention relates to a process for forming microstructures on a substrate. A plating surface is applied to a substrate. A first layer of photoresist is applied on top of the plating base. The first layer of photoresist is exposed to radiation in a pattern to render the first layer of photoresist dissolvable in a first pattern. The dissolvable photoresist is removed and a first layer of primary metal is electroplated in the area where the first layer of photoresist was removed. The remainder of the photoresist is then removed and a second layer of photoresist is then applied over the plating base and first layer of primary metal. The second layer of photoresist is then exposed to a second pattern of radiation to render the photoresist dissolvable and the dissolvable photoresist is removed. The second pattern is an area that surrounds the primary structure, but it does not entail the entire substrate. Rather it is an island surrounding the primary metal. The exposed surface of the secondary metal is then machined down to a desired height of the primary metal. The secondary metal is then etched away.

公开(公告)号：EP1518822A3

公开(公告)日：2007-02-28

申请号：EP04015983.2

申请日：2002-12-06

Applicant: Microfabrica Inc.

Inventor： Bang, Christopher A.

IPC: B81C5/00 ,  G02B26/08

CPC classification number: B81C1/00182 ,  B81B2201/042 ,  B81B2203/058 ,  B81C1/0038 ,  B81C2201/0197 ,  H01P3/08 ,  H01P11/003

Abstract: The invention concerns various embodiments directed to various microdevices, including sensors, actuators, valves, scanning mirrors, accelerometers, switches, and the like. In some embodiments the devices are formed via electrochemical fabrication (EFAB tm ).
In particular, the invention concerns a microdevice comprising an electrostatically actuated micro-mirror scanning system comprising contoured electrodes that allow a reduced drive voltage without hindering mirror movement.

公开(公告)号：EP1015669A1

公开(公告)日：2000-07-05

申请号：EP98914464.7

申请日：1998-04-03

Applicant: University of Southern California

Inventor： COHEN, Adam, L.

IPC: C25D5/02 ,  C25D5/10

CPC classification number: C25D5/10 ,  B33Y10/00 ,  B33Y70/00 ,  B81C1/00126 ,  B81C2201/0181 ,  B81C2201/0197 ,  B81C2201/032 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/12 ,  C25D5/22 ,  C25D17/06 ,  H01L21/2885 ,  H05K3/241 ,  Y10T428/12486 ,  Y10T428/239

Abstract: An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.

Abstract translation: 一种电镀方法，其包括：a）使第一基板与第一制品接触，所述第一制品包括以基板形式设置的基板和适形掩模; b）以第一图案将来自金属离子源的第一金属电镀到所述第一基板上，所述第一图案对应于所述适形掩模图案的所述补体; 和c）从第一基底去除第一制品。 还公开了电镀制品和电镀装置。

公开(公告)号：EP3046872A4

公开(公告)日：2017-07-12

申请号：EP14843830

申请日：2014-09-08

Applicant: UNIV GRIFFITH

Inventor： IACOPI FRANCESCA ,  AHMED MOHSIN ,  CUNNING BENJAMIN VAUGHAN

IPC: C01B32/188 ,  B32B9/00 ,  B81C1/00 ,  C01B32/184 ,  C30B1/00 ,  C30B1/02 ,  C30B1/10 ,  C30B29/02 ,  H01L21/00 ,  H01L21/02

CPC classification number: C30B1/026 ,  B81C1/0038 ,  B81C2201/0197 ,  C01B32/184 ,  C01B32/188 ,  C30B1/10 ,  C30B29/02 ,  H01L21/00 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02491 ,  H01L21/02527 ,  H01L21/02614

Abstract: A process for forming graphene, includes: depositing at least a first and a second metal onto a surface of silicon carbide (SiC), and heating the SiC and the first and second metals under conditions that cause the first metal to react with silicon of the silicon carbide to form carbon and at least one stable silicide. The corresponding solubilities of the carbon in the stable silicide and in the second metal are sufficiently low that the carbon produced by the silicide reaction forms a graphene layer on the SiC.

Abstract translation: 一种形成石墨烯的方法包括：在碳化硅（SiC）的表面上沉积至少第一和第二金属，并且在使第一金属与第一金属与第二金属的硅反应的条件下加热SiC和第一和第二金属 碳化硅形成碳和至少一种稳定的硅化物。 碳在稳定硅化物和第二金属中的相应溶解度足够低，以致由硅化物反应产生的碳在SiC上形成石墨烯层。

公开(公告)号：EP3046872A1

公开(公告)日：2016-07-27

申请号：EP14843830.2

申请日：2014-09-08

Applicant: Griffith University

Inventor： IACOPI, Francesca ,  AHMED, Mohsin ,  CUNNING, Benjamin Vaughan

IPC: C01B31/00 ,  C01B31/04 ,  C30B1/00 ,  C30B1/02 ,  B32B9/00

CPC classification number: C30B1/026 ,  B81C1/0038 ,  B81C2201/0197 ,  C01B32/184 ,  C01B32/188 ,  C30B1/10 ,  C30B29/02 ,  H01L21/00 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02491 ,  H01L21/02527 ,  H01L21/02614

Abstract: A process for forming graphene, including : depositing at least two metals onto a surface of silicon carbide (SiC), the at least two metals including at least one first metal and at least one second metal; and heating the SiC and the first and second metals under conditions that cause the at least one first metal to react with silicon of the silicon carbide to form carbon and at least one stable silicide, and the corresponding solubilities of the carbon in the at least one stable silicide and in the at least one second metal are sufficiently low that the carbon produced by the silicide reaction forms a graphene layer on the SiC.

Abstract translation: 一种形成石墨烯的方法，包括：将至少第一和第二金属沉积在碳化硅（SiC）的表面上，以及在导致第一金属与硅的反应的条件下加热SiC和第一和第二金属 碳化硅以形成碳和至少一种稳定的硅化物。 碳在稳定硅化物和第二金属中的相应溶解度足够低，使得由硅化物反应产生的碳在SiC上形成石墨烯层。

公开(公告)号：EP2879988A2

公开(公告)日：2015-06-10

申请号：EP13829083.8

申请日：2013-07-31

Applicant: Robert Bosch GmbH ,  Chen, Po-Jui ,  Yama, Gary ,  Liger, Matthieu ,  Graham, Andrew

Inventor： CHEN, Po-Jui ,  YAMA, Gary ,  LIGER, Matthieu ,  GRAHAM, Andrew

IPC: B81B7/02 ,  B81C1/00

CPC classification number: H01L29/84 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/015 ,  B81C1/0023 ,  B81C2201/0197 ,  B81C2203/0136 ,  B81C2203/0771 ,  G01C19/5783 ,  G01P15/0802 ,  G01P15/18 ,  H01L29/66007

Abstract: A device with multiple encapsulated functional layers, includes a substrate, a first functional layer positioned above a top surface of the substrate, the functional layer including a first device portion, a first encapsulating layer encapsulating the first functional layer, a second functional layer positioned above the first encapsulating layer, the second functional layer including a second device portion, and a second encapsulating layer encapsulating the second functional layer.

Abstract translation: 具有多个封装功能层的器件包括衬底，位于衬底顶表面上方的第一功能层，功能层包括第一器件部分，封装第一功能层的第一封装层，以及位于第一功能层上方的第二功能层 第一封装层，第二功能层包括第二器件部分和封装第二功能层的第二封装层。