GLEICHRICHTERDIODE
    11.
    发明公开
    GLEICHRICHTERDIODE 失效
    整流二极管

    公开(公告)号:EP0731984A1

    公开(公告)日:1996-09-18

    申请号:EP95901331.0

    申请日:1994-11-26

    申请人: ROBERT BOSCH GMBH

    发明人: SPITZ, Richard

    IPC分类号: H01L23 H01L29

    摘要: The invention concerns a rectifier diode with a press-fit base which has a longitudinally extending fixation zone for a semiconductor chip, the rectifier diode also having a head wire fixed to the chip, embedding for the head wire and a head-wire strain-relief device which is simple in design, ensures high strain relief and permits easy application of a passivation film to the chip. The invention calls for a collar (44) to be located round the outside edge (42) of the fixation zone (14), the collar projecting out at an angle to the longitudinal axis (50) of the fixation zone (14), preferably beyond the fixation surface (16) of the fixation zone (14).

    Anisotropic rectifier and method for fabricating same
    12.
    发明公开
    Anisotropic rectifier and method for fabricating same 失效
    各向异性整流器及其制造方法

    公开(公告)号:EP0217780A3

    公开(公告)日:1989-03-29

    申请号:EP86870141.8

    申请日:1986-10-02

    IPC分类号: H01L29/91

    摘要: A rectifier is fabricated from a P-N junction having a P-type semiconductor layer and an adjacent N-type semi­conductor layer. A mesa structure is formed in at least one of said layers. Impurities are deposited at the top of the mesa to form a high concentration region in the surface thereof. The impurities are diffused from the top surface of the mesa toward the P-N junction, whereby the mesa geometry causes the diffusion to take on a generally concave shape as it penetrates into the mesa. The distance between the perimeter of the high concentration region and the wafer substrate is therefore greater than the distance between the central portion of said region and the wafer substrate, providing improved breakdown voltage characteristics and a lower surface field. Breakdown voltage can be measured during device fabrication and precisely controlled by additional diffusions to drive the high concentration region to the required depth.

    Glass-sealed multichip process
    13.
    发明公开
    Glass-sealed multichip process 失效
    在玻璃封装多个芯片的方法。

    公开(公告)号:EP0013815A1

    公开(公告)日:1980-08-06

    申请号:EP79302905.9

    申请日:1979-12-14

    IPC分类号: H01L21/56 H01L23/28

    摘要: The preferred embodiment of the invention comprises a glass sealed thyristor (10) and a method for simultaneously constructing a plurality of thyristors on a common semiconductor wafer (46). The thyristor utilizes a body of semiconductor material with the cathode and base regions (20, 24) extending to one major surface (14) and the anode region (22) extending to the second major surface (16). A groove (36) is etched in the first surface of the body of semiconductor material to expose the PN junction formed at the interface of the cathode emitter and cathode emitter base regions. A second groove (40) is etched in the second major surface to expose the PN junction formed at the interface of the anode emitter region and the anode emitter base region. Ring shaped glass members (42). are fused to the body of semiconductor material to form seals providing environmental protection for the PN junctions exposed by etching the grooves in the major surfaces of the body of semiconductor material. A plurality of thyristors can be simultaneously constructed on a common semiconductor wafer.

    SEMICONDUCTOR DEVICE
    16.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:EP3171410A1

    公开(公告)日:2017-05-24

    申请号:EP15821742.2

    申请日:2015-05-18

    摘要: An influence of a gate interference is suppressed and a reverse recovery property of a diode is improved. A diode includes a diode region located between the first boundary trench and the second boundary trench and a first and second IGBT regions. An emitter region and a body region are provided in each of the first and second IGBT regions. Each body region includes a body contact portion. An anode region is provided in the diode region. The anode region includes an anode contact portion. An interval between the first and second boundary trenches is equal to or longer than 200 µm. An area ratio of the anode contact portion in the diode region is lower than each of an area ratio of the body contact portion in the first IGBT region and an area ratio of the body contact portion in the second IGBT region.

    摘要翻译: 栅极干扰的影响被抑制并且二极管的反向恢复特性得到改善。 二极管包括位于第一边界沟槽和第二边界沟槽之间的二极管区域以及第一和第二IGBT区域。 在第一和第二IGBT区域中的每一个中设置发射极区域和本体区域。 每个身体区域包括身体接触部分。 在二极管区域中提供阳极区域。 阳极区域包括阳极接触部分。 第一和第二边界沟槽之间的间隔等于或大于200μm。 二极管区域中的阳极接触部分的面积比低于第一IGBT区域中的体接触部分的面积比和第二IGBT区域中的体接触部分的面积比率中的每一个。

    SEMICONDUCTOR DEVICE, AND METHOD FOR PRODUCING SAME
    17.
    发明公开
    SEMICONDUCTOR DEVICE, AND METHOD FOR PRODUCING SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号:EP3159932A1

    公开(公告)日:2017-04-26

    申请号:EP15811392.8

    申请日:2015-06-17

    摘要: According to one embodiment, a semiconductor device includes an n-type semiconductor layer containing diamond, a first electrode including a first portion, an intermediate layer, and a p-type semiconductor layer containing diamond. The intermediate layer contains at least any of a carbide, graphite, graphene, and amorphous carbon. The carbide contains at least any of Ti, Si, Al, W, Ni, Cr, Ca, Li, Ru, Mo, Zr, Sr, Co, Rb, K, Cu, and Na. The intermediate layer includes a first region provided between the first portion and the n-type semiconductor layer, and a second region provided around the first region when projected on a plane perpendicular to a direction from the n-type semiconductor layer to the first electrode. The second region does not overlap the first portion, and is continuous with the first region.

    摘要翻译: 根据一个实施例,半导体器件包括含有金刚石的n型半导体层,包括第一部分的第一电极,中间层和含有金刚石的p型半导体层。 中间层至少含有碳化物,石墨,石墨烯和无定形碳中的任一种。 碳化物至少含有Ti,Si,Al,W,Ni,Cr,Ca,Li,Ru,Mo,Zr,Sr,Co,Rb,K,Cu和Na中的任一种。 中间层包括设置在第一部分和n型半导体层之间的第一区域以及当投影到垂直于从n型半导体层到第一电极的方向的平面上时设置在第一区域周围的第二区域。 第二区域不与第一部分重叠,并且与第一区域连续。

    GLASS COMPOSITION FOR SEMICONDUCTOR JUNCTION PROTECTION, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
    19.
    发明公开
    GLASS COMPOSITION FOR SEMICONDUCTOR JUNCTION PROTECTION, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 有权
    半导体接合保护用玻璃组合物,半导体装置的制造方法以及半导体装置

    公开(公告)号:EP2983197A1

    公开(公告)日:2016-02-10

    申请号:EP13844589.5

    申请日:2013-03-29

    摘要: Provided is a glass composition for protecting a semiconductor junction for forming a glass layer which protects a pn junction, wherein the glass composition for protecting a semiconductor junction is made of fine glass particles prepared from a material in a molten state obtained by melting a glass raw material which contains at least ZnO, SiO 2 , B 2 O 3 , Al 2 O 3 and at least two oxides of alkaline earth metals selected from a group consisting of BaO, CaO and MgO and substantially contains none of Pb, As, Sb, Li, Na and K, the glass composition for protecting a semiconductor junction containing no filler.
    According to the present invention, it is possible to manufacture a semiconductor device having high reliability using a glass material containing no lead. Further, a baking temperature at which a layer made of the glass composition for protecting a semiconductor junction is baked can be set further lower than a baking temperature at which a layer made of a conventional "glass material containing lead silicate as a main component" is baked so that a semiconductor device having an excellent switching characteristic can be manufactured.

    摘要翻译: 本发明提供一种用于保护用于形成保护pn结的玻璃层的半导体结的玻璃组合物,其中用于保护半导体结的玻璃组合物由玻璃微粒制成,所述玻璃微粒由熔融状态的材料制备, 至少含有ZnO,SiO2,B2O3,Al2O3和至少两种选自BaO,CaO和MgO的碱土金属氧化物并且基本上不含Pb,As,Sb,Li,Na和K的材料,所述 用于保护不含填料的半导体结的玻璃组合物。 根据本发明,可以使用不含铅的玻璃材料制造具有高可靠性的半导体器件。 此外,可以将由用于保护半导体结的玻璃组合物制成的层进行烘焙的烘烤温度设定得比由传统的“由含铅硅酸盐作为主要成分的玻璃材料”制成的层的烘烤温度低得多 烘烤,从而可以制造具有优良开关特性的半导体器件。