SEMICONDUCTOR MEMORY DEVICE
    60.
    发明公开

    公开(公告)号:EP4404199A1

    公开(公告)日:2024-07-24

    申请号:EP23192608.0

    申请日:2023-08-22

    发明人: Komano, Yusuke

    IPC分类号: G11C11/56

    摘要: According to one embodiment, a semiconductor memory device includes a memory cell array (11A/11B) and a control circuit (14). The memory cell array (11A/11B) includes two or more memory cells. The control circuit (14) is configured to control a write operation of writing first data to the two or more memory cells and a read operation of reading the first data from the two or more memory cells. The control circuit (14) sets cell states of the two or more memory cells based on second data included in the first data in the write operation. The control circuit (14) converts read data into the first data based on the second data included in data read from the two or more memory cells in the read operation.