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    APPARATUSES AND METHODS FOR DETECTING WRITE COMPLETION FOR RESISTIVE MEMORY
    3.
    发明公开
    APPARATUSES AND METHODS FOR DETECTING WRITE COMPLETION FOR RESISTIVE MEMORY 审中-公开
    器件和方法写作过程中终止而电阻式存储器检测

    公开(公告)号：EP3149742A1

    公开(公告)日：2017-04-05

    申请号：EP15800215.4

    申请日：2015-04-28

    申请人： Intel Corporation

    发明人： LIN, Blake C. ,  DRAY, Cyrille ,  ROY, Ananda ,  WEI, Liqiong ,  HAMZAOGLU, Faith

    IPC分类号： G11C13/00

    CPC分类号： G11C13/004 ,  G11C11/1675 ,  G11C11/1677 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0057 ,  G11C2013/0066 ,  G11C2013/0078

    摘要： Described are apparatuses and methods for improving resistive memory energy efficiency and reliability. An apparatus may include a resistive memory cell coupled to a conductive line. The apparatus may further include a driver coupled to the conductive line to drive current for the resistive memory cell during a write operation. The resistance of the driver may be selectively increased for two or more time periods during the write operation for detecting a voltage change on the conductive line. The current for the write operation may be turned off when the voltage change is detected to improve resistive memory energy efficiency and reliability.

    摘要翻译： 描述的是用于提高电阻式存储器的能量效率和可靠性的方法和装置。 一种装置可以包括耦合到导电线上的电阻性存储器单元。 该装置可以包括另外耦合到所述导电线的驱动器的写入操作期间驱动用于电阻存储单元的电流。 驾驶员的电阻可在写入操作期间选择性地增加为两个或更多个时间段，用于检测在导电线路的电压变化。 当检测到的电压变化，以提高电阻式存储器的能量效率和可靠性的写入手术的电流可被关断。

    APPARATUSES AND METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS
    4.
    发明公开
    APPARATUSES AND METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS 审中-公开
    VORRICHTUNGEN UND VERFAHREN ZURDURCHFÜHRUNGMEHRERER SPEICHEROPERATIONEN

    公开(公告)号：EP3140833A1

    公开(公告)日：2017-03-15

    申请号：EP15788901.5

    申请日：2015-05-04

    申请人： Micron Technology, Inc.

    发明人： BALLUCHI, Daniele ,  VILLA, Corrado

    IPC分类号： G11C13/00 ,  G11C11/00

    CPC分类号： G11C16/10 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  G11C16/32 ,  G11C16/3436 ,  G11C16/3459 ,  G11C2213/79

    摘要： The disclosed technology relates to a memory device configured to perform multiple access operations in response to a single command received through a memory controller and a method of performing the multiple access operations. In one aspect, the memory device includes a memory array comprising a plurality of memory cells and a memory controller. The memory controller is configured to receive a single command which specifies a plurality of memory access operations to be performed on the memory array. The memory controller is further configured to cause the specified plurality of memory access operations to be performed on the memory array.

    摘要翻译： 所公开的技术涉及被配置为响应于通过存储器控制器接收的单个命令和执行多址访问操作的方法来执行多次访问操作的存储器件。 在一个方面，存储器件包括包括多个存储器单元和存储器控制器的存储器阵列。 存储器控制器被配置为接收指定对存储器阵列执行的多个存储器访问操作的单个命令。 存储器控制器还被配置为使得对存储器阵列执行指定的多个存储器访问操作。

    WRITE OPERATION METHOD AND DEVICE FOR PHASE-CHANGE MEMORY
    7.
    发明公开
    WRITE OPERATION METHOD AND DEVICE FOR PHASE-CHANGE MEMORY 审中-公开
    写相变存储器的操作方法和装置

    公开(公告)号：EP2881951A1

    公开(公告)日：2015-06-10

    申请号：EP14786779.0

    申请日：2014-04-29

    申请人： Huawei Technologies Co., Ltd.

    发明人： LI, Yansong

    IPC分类号： G11C13/00

    CPC分类号： G11C13/0069 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0064 ,  G11C2013/0066

    摘要： The present invention discloses a write operation method and device for a phase change memory and belongs to the computer field. The method includes: when a phase change memory performs a write operation, generating a corresponding voltage pulse signal according to to-be-written data, and applying the voltage pulse signal to a phase change material included in a phase change storage unit corresponding to the to-be-written data and applying the voltage pulse signal to a voltage divider resistor serially connected to the phase change material; comparing voltage values at both ends of a sampling resistor with a threshold voltage to generate an indicator value; determining, according to the indicator value, whether data that is stored in the phase change storage unit and is corresponding to the indicator value is the same as the to-be-written data; and skipping writing the to-be-written data into the phase change storage unit corresponding to the to-be-written data, if the same; or writing the to-be-written data into the phase change storage unit corresponding to the to-be-written data, if different. In the present invention, delay time of writing data into the phase change storage unit is reduced, thereby improving efficiency of a write operation.

    摘要翻译： 本发明公开了一种相变存储器的写操作方法及装置，属于计算机领域。 所述方法包括：当相变存储器进行写操作时，根据待写入数据生成对应的电压脉冲信号，并将所述电压脉冲信号施加至所述相变存储单元所包含的相变材料中， 将所述电压脉冲信号施加至串联连接至所述相变材料的分压器电阻; 将采样电阻器两端的电压值与阈值电压进行比较以产生指示值; 根据所述指标值确定存储在所述相变存储单元中且与所述指标值对应的数据是否与所述待写入数据相同; 如果相同，则跳过将待写入数据写入与待写入数据对应的相变存储单元; 或者将待写入数据写入与待写入数据对应的相变存储单元中。 在本发明中，减少了将数据写入相变存储单元的延迟时间，由此提高了写入操作的效率。

    Self-terminating write for a memory cell
    8.
    发明公开
    Self-terminating write for a memory cell 审中-公开
    SelbstabschließenderSchreibvorgang在einer Speicherzelle

    公开(公告)号：EP2869302A1

    公开(公告)日：2015-05-06

    申请号：EP14181069.7

    申请日：2014-08-14

    申请人： Honeywell International Inc.

    发明人： Golke, Keith ,  Nelson, David K.

    IPC分类号： G11C13/00 ,  G11C13/02

    CPC分类号： G11C13/0069 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0011 ,  G11C13/0064 ,  G11C13/025 ,  G11C2211/5624 ,  G11C2213/79

    摘要： A programmable impedance based memory device includes a programmable impedance element, read circuitry configured to determine a resistance of the programmable impedance element during a write operation; and, write circuitry configured to change the resistance of the programmable impedance element as part of performing the write operation, wherein the write circuitry is further configured to terminate the write operation based on the read circuitry detecting that the resistance of the programmable impedance element has passed a threshold value.

    摘要翻译： 基于可编程阻抗的存储器件包括可编程阻抗元件，读取电路，被配置为在写入操作期间确定可编程阻抗元件的电阻; 以及写入电路，被配置为作为执行所述写入操作的一部分而改变所述可编程阻抗元件的电阻，其中所述写入电路还被配置为基于所述读取电路终止所述写入操作，所述读取电路检测到所述可编程阻抗元件的电阻已经通过 阈值。