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公开(公告)号:EP3475979B1
公开(公告)日:2020-05-27
申请号:EP17735056.8
申请日:2017-06-26
申请人: ABB Schweiz AG
IPC分类号: H01L23/473 , H05K1/02
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公开(公告)号:EP3566246A1
公开(公告)日:2019-11-13
申请号:EP18704192.6
申请日:2018-02-01
申请人: ABB Schweiz AG
发明人: LIU, Chunlei , SCHUDERER, Jürgen , BREM, Franziska , RAHIMO, Munaf , STEIMER, Peter Karl , DUGAL, Franc
IPC分类号: H01L23/051 , H01L23/535 , H01L23/62 , H01L25/07 , H01L29/16 , H01L23/00
摘要: A power semiconductor device includes a base plate; a Si chip including a Si substrate, the Si chip attached to the base plate; a first metal preform pressed with a first press pin against the Si chip; a wide bandgap material chip comprising a wide bandgap substrate and a semiconductor switch provided in the wide bandgap substrate, the wide bandgap material chip attached to the base plate; and a second metal preform pressed with a second press pin against the wide bandgap material chip; the Si chip and the wide bandgap material chip are connected in parallel via the base plate and via the first press pin and the second press pin; the first metal preform is adapted for forming a conducting path through the Si chip, when heated by an overcurrent; and the second metal preform is adapted for forming an temporary conducting path through the wide bandgap material chip or an open circuit, when heated by an overcurrent.
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公开(公告)号:EP3298626B1
公开(公告)日:2019-07-03
申请号:EP16725817.7
申请日:2016-05-20
申请人: ABB Schweiz AG
发明人: TRAUB, Felix , MOHN, Fabian , SCHUDERER, Jürgen , KEARNEY, Daniel , KICIN, Slavo
IPC分类号: H01L23/538 , H01L23/64 , H01L25/07
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公开(公告)号:EP3475979A1
公开(公告)日:2019-05-01
申请号:EP17735056.8
申请日:2017-06-26
申请人: ABB Schweiz AG
IPC分类号: H01L23/473 , H05K1/02
摘要: An electronics package includes an electrically conducting support layer; at least one electrically conducting outer layer; at least two power electronics components arranged on different sides of the support layer and electrically interconnected with the support layer and with the at least one outer layer; and isolation material, in which the support layer and the at least two power electronics components are embedded, the support layer and the at least one outer layer are laminated together with the isolation material; and a cooling channel for conducting a cooling fluid through the electronics package, the cooling channel runs between the at least two power electronics components through the support layer.
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公开(公告)号:EP3341965B1
公开(公告)日:2019-04-24
申请号:EP17705928.4
申请日:2017-02-23
申请人: ABB Schweiz AG , AUDI AG
发明人: MOHN, Fabian , SCHUDERER, Jürgen , TRAUB, Felix
IPC分类号: H01L23/538 , H01L23/498 , H01L23/13 , H01L25/07 , H05K1/18 , H01L23/14
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公开(公告)号:EP3613077A1
公开(公告)日:2020-02-26
申请号:EP18720620.6
申请日:2018-04-30
申请人: ABB Schweiz AG , Audi AG
发明人: MOHN, Fabian , TRAUB, Felix , SCHUDERER, Jürgen
IPC分类号: H01L25/07 , H01L23/498 , H01L23/538
摘要: A half-bridge module includes a substrate with a base metallization layer divided into a first DC conducting area, a second DC conducting area and an AC conducting area; at least one first power semiconductor switch chip bonded to the first DC conducting area and electrically interconnected with the AC conducting area; at least one second power semiconductor switch chip bonded to the AC conducting area and electrically interconnected with the second DC conducting area; and a coaxial terminal arrangement including at least one inner DC terminal, the at least first outer DC terminal and the at least one second outer DC terminal protrude from the module and are arranged in a row, such that the at least one inner DC terminal is coaxially arranged between the at least one first outer DC terminal and the at least one second outer DC terminal; wherein the at least one inner DC terminal is electrically connected to the second DC conducting area; the at least one first outer DC terminal and the at least one second outer DC terminal are electrically connected to the first DC conducting area; and the at least one first outer DC terminal and the at least one second outer DC terminal are electrically interconnected with an electrically conducting bridging element which is adapted for distributing at least a half of the load current between the at least one first outer DC terminal and the at least one second outer DC terminal.
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公开(公告)号:EP3545550A1
公开(公告)日:2019-10-02
申请号:EP17801058.3
申请日:2017-11-23
申请人: ABB Schweiz AG , Audi AG
发明人: MOHN, Fabian , LIU, Chunlei , SCHUDERER, Jürgen
IPC分类号: H01L23/495 , H01L23/498 , H01L21/56 , H01L25/07
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公开(公告)号:EP3341965A1
公开(公告)日:2018-07-04
申请号:EP17705928.4
申请日:2017-02-23
申请人: ABB Schweiz AG , AUDI AG
发明人: MOHN, Fabian , SCHUDERER, Jürgen , TRAUB, Felix
IPC分类号: H01L23/538 , H01L23/498 , H01L23/13 , H01L25/07 , H05K1/18 , H01L23/14
CPC分类号: H01L23/49822 , H01L23/13 , H01L23/142 , H01L23/3735 , H01L23/5383 , H01L24/48 , H01L24/49 , H01L25/072 , H01L2224/0603 , H01L2224/40225 , H01L2224/48491 , H01L2224/49111 , H01L2224/49175 , H01L2224/49431 , H01L2224/49433 , H01L2924/15153 , H01L2924/181 , H05K1/0204 , H05K1/0206 , H05K1/0263 , H05K1/183 , H05K3/0061 , H05K2201/10166 , H05K2201/10318
摘要: A power module comprises at least one power semiconductor device with an electrical top contact area on a top side; and a multi-layer circuit board with multiple electrically conducting layers which are separated by multiple electrically isolating layers, the electrically isolating layers being laminated together with the electrically conducting layers; wherein the multi-layer circuit board has at least one cavity, which is opened to a top side of the multi-layer circuit board, which cavity reaches through at least two electrically conducting layers; wherein the power semiconductor device is attached with a bottom side to a bottom of the cavity; and wherein the power semiconductor device is electrically connected to a top side of the multi-layer circuit board with a conducting member bonded to the top contact area and bonded to the top side of the multi-layer circuit board.
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公开(公告)号:EP3298626A1
公开(公告)日:2018-03-28
申请号:EP16725817.7
申请日:2016-05-20
申请人: ABB Schweiz AG
发明人: TRAUB, Felix , MOHN, Fabian , SCHUDERER, Jürgen , KEARNEY, Daniel , KICIN, Slavo
IPC分类号: H01L23/538 , H01L23/64 , H01L25/07
CPC分类号: H01L23/5385 , H01L23/3735 , H01L23/49811 , H01L23/645 , H01L25/072 , H01L29/00 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19107 , H01L2924/00014
摘要: The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane. The first plane is spaced apart from the second plane in a direction normal to the first plane, whereby the first substrate is based on a direct bonded copper substrate and the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a layer of a printed circuit board is provided for carrying the diode. Alternatively, the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a foil is provided for carrying the diode, wherein the foil comprises an electrically insulating main body and an electrically conductive structure provided thereon for carrying the diode. Such a power semiconductor module provides a low stray inductance and/or may be built easily.
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