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    System-in-package with integrated protection socket
    1.
    发明公开
    System-in-package with integrated protection socket 审中-公开
    系统级封装，集成保护盖

    公开(公告)号：EP2631943A3

    公开(公告)日：2014-01-22

    申请号：EP12006331.8

    申请日：2012-09-07

    申请人： Broadcom Corporation

    发明人： Zhao, Sam ,  Hu, Kevin ,  Karikalan, Sampath ,  Khan, Rezaur ,  Vorenkamp, Pieter ,  Chen, Xiangdong

    IPC分类号： H01L25/065 ,  H01L23/552

    摘要： There are disclosed herein various implementations of a system-in-package with integrated socket. In one such implementation, the system-in-package (100) includes a first active die (110) having a first plurality of electrical connectors on a top surface of the first active die, an interposer (130) situated over the first active die, and a second active die (120) having a second plurality of electrical connectors on a bottom surface of the second active die. The interposer is configured to selectively couple at least one of the first plurality of electrical connectors to at least one of the second plurality of electrical connectors. In addition, a socket (160) encloses the first and second active dies and the interposer, the socket being electrically coupled to at least one of the first active die, the second active die, and the interposer.

    Semiconductor package with improved testability
    5.
    发明公开
    Semiconductor package with improved testability 审中-公开
    Halbleiterpaket mit verbesserterPrüfbarkeit

    公开(公告)号：EP2624288A2

    公开(公告)日：2013-08-07

    申请号：EP12006188.2

    申请日：2012-08-31

    申请人： Broadcom Corporation

    发明人： Zhao, Sam ,  Karikalan, Sampath ,  Vorenkamp, Pieter ,  Hu, Kevin ,  Khan, Rezaur ,  Chen, Xiangdong

    IPC分类号： H01L21/66

    CPC分类号： H01L22/32 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15192 ,  H01L2924/1533 ,  H01L2924/15331 ,  H01L2224/81 ,  H01L2924/014

    摘要： An exemplary implementation of the present disclosure includes a testable semiconductor package (100) that includes an active die (102) having interface contacts (112a-112c) and dedicated testing contacts (114a, 114b). An interposer (104) is situated adjacent a bottom surface (116a) of the active die (102), the interposer (104) providing electrical connections between the interface contacts (112a-112c) and a bottom surface (118a) of the testable semiconductor package. At least one conductive medium provides electrical connection between at least one of the dedicated testing contacts (114a, 114b) and a top surface (118b) of the testable semiconductor package. The at least one conductive medium can be coupled to a package-top testing connection (108a, 108b), which may include a solder ball.

    摘要翻译： 本公开的示例性实施方案包括可测试半导体封装（100），其包括具有接口触点（112a-112c）和专用测试触点（114a，114b）的有源裸片（102）。 插入器（104）位于有源裸片（102）的底表面（116a）附近，插入器（104）提供接口触点（112a-112c）和可测半导体的底表面（118a）之间的电连接 包。 至少一个导电介质提供至少一个专用测试触头（114a，114b）和可测试半导体封装的顶表面（118b）之间的电连接。 所述至少一个导电介质可以耦合到可以包括焊球的封装顶部测试连接（108a，108b）。

    System-in-package with integrated protection socket
    7.
    发明公开
    System-in-package with integrated protection socket 审中-公开
    系统级封装系统Schutzhülle

    公开(公告)号：EP2631943A2

    公开(公告)日：2013-08-28

    申请号：EP12006331.8

    申请日：2012-09-07

    申请人： Broadcom Corporation

    发明人： Zhao, Sam ,  Hu, Kevin ,  Karikalan, Sampath ,  Khan, Rezaur ,  Vorenkamp, Pieter ,  Chen, Xiangdong

    IPC分类号： H01L25/065

    摘要： There are disclosed herein various implementations of a system-in-package with integrated socket. In one such implementation, the system-in-package (100) includes a first active die (110) having a first plurality of electrical connectors on a top surface of the first active die, an interposer (130) situated over the first active die, and a second active die (120) having a second plurality of electrical connectors on a bottom surface of the second active die. The interposer is configured to selectively couple at least one of the first plurality of electrical connectors to at least one of the second plurality of electrical connectors. In addition, a socket (160) encloses the first and second active dies and the interposer, the socket being electrically coupled to at least one of the first active die, the second active die, and the interposer.

    摘要翻译： 这里公开了具有集成插座的系统级封装的各种实现方式。 在一个这样的实施方案中，系统级封装（100）包括在第一有源裸片的顶表面上具有第一多个电连接器的第一有源裸片（110），位于第一有源裸片上的插入器（130） ，以及在所述第二有源裸片的底表面上具有第二多个电连接器的第二有源裸片（120）。 插入器被配置为选择性地将第一多个电连接器中的至少一个耦合到第二多个电连接器中的至少一个。 此外，插座（160）包围第一和第二有源裸片和插入器，插座电耦合到第一有源裸片，第二激活裸片和插入器中的至少一个。