-
1.发明公开Reflowed solder ball with low melting point metal cap 失效Lötkugelmit einer Metallkappe niedrigen Schmelzpunktes
公开(公告)号：EP0747954A3
公开(公告)日：1997-05-07
申请号：EP96480060.1
申请日：1996-05-07
发明人： Dalal, Hormazdyar Minacher , Fallon, Kenneth Michael , Bitaillou, Alexis , Gaudenzi, Gene Joseph , Herman, Kenneth Robert , Robert, Georges , Pierre, Frédéric
IPC分类号： H01L23/485
CPC分类号： H01L24/12 , H01L21/0331 , H01L21/4853 , H01L23/49816 , H01L24/11 , H01L2224/0401 , H01L2224/05171 , H01L2224/05184 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/05671 , H01L2224/1147 , H01L2224/11472 , H01L2224/11902 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/136 , H01L2224/13609 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H05K3/143 , H05K3/3436 , H05K3/3463 , H05K2201/10992 , H05K2203/043 , Y02P70/613 , H01L2924/00014 , H01L2224/13099 , H01L2224/29099 , H01L2924/00 , H01L2924/013
摘要： A method and structure for a solder interconnection, using solder balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate is disclosed. After a solder ball has been formed using standard methods it is reflowed to give the solder ball a smooth surface. A layer of low melting point metal, such as, bismuth, indium or tin, preferably, pure tin, is deposited on the top of the solder balls. This structure results in localizing of the eutectic alloy, formed upon subsequent low temperature joining cycle, to the top of the high melting solder ball even after multiple low temperature reflow cycles. This method does not need tinning of the substrate to which the chip is to be joined, which makes this method economical. It has also been noticed that whenever temperature is raised slightly above the eutectic temperature, the structure always forms a liquid fillet around the joint with copper wires. This liquid fillet formation results in substantial thermal fatigue life improvement for reduced stress at interface; and secondly, provides an easy means to remove chip for the purpose of chip burn-in, replacement or field repairs.
摘要翻译： 公开了一种用于焊接互连的方法和结构，其使用用于将低温芯片附接到任何更高级别的封装衬底的焊球。 在使用标准方法形成焊球之后，回流焊接球，使其表面光滑。 一层低熔点金属，例如铋，铟或锡，优选纯锡，沉积在焊料球的顶部。 这种结构导致即使在多个低温回流循环之后，在随后的低温接合循环中形成的共晶合金也定位到高熔点焊料球的顶部。 该方法不需要对芯片要连接的基板进行镀锡，这使得该方法成本低廉。 还注意到，当温度升高到略高于共晶温度时，结构总是用铜线在接头周围形成液体圆角。 这种液体圆角形成导致显着的热疲劳寿命改善以减少界面处的应力; 其次，为了芯片烧录，更换或现场维修的目的，提供了一种便于拆卸芯片的方法。
-
公开(公告)号：EP0747954A2
公开(公告)日：1996-12-11
申请号：EP96480060.1
申请日：1996-05-07
发明人： Dalal, Hormazdyar Minacher , Fallon, Kenneth Michael , Bitaillou, Alexis , Gaudenzi, Gene Joseph , Herman, Kenneth Robert , Robert, Georges , Pierre, Frédéric
IPC分类号： H01L23/485
CPC分类号： H01L24/12 , H01L21/0331 , H01L21/4853 , H01L23/49816 , H01L24/11 , H01L2224/0401 , H01L2224/05171 , H01L2224/05184 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/05671 , H01L2224/1147 , H01L2224/11472 , H01L2224/11902 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/136 , H01L2224/13609 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H05K3/143 , H05K3/3436 , H05K3/3463 , H05K2201/10992 , H05K2203/043 , Y02P70/613 , H01L2924/00014 , H01L2224/13099 , H01L2224/29099 , H01L2924/00 , H01L2924/013
摘要： A method and structure for a solder interconnection, using solder balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate is disclosed. After a solder ball has been formed using standard methods it is reflowed to give the solder ball a smooth surface. A layer of low melting point metal, such as, bismuth, indium or tin, preferably, pure tin, is deposited on the top of the solder balls. This structure results in localizing of the eutectic alloy, formed upon subsequent low temperature joining cycle, to the top of the high melting solder ball even after multiple low temperature reflow cycles. This method does not need tinning of the substrate to which the chip is to be joined, which makes this method economical. It has also been noticed that whenever temperature is raised slightly above the eutectic temperature, the structure always forms a liquid fillet around the joint with copper wires. This liquid fillet formation results in substantial thermal fatigue life improvement for reduced stress at interface; and secondly, provides an easy means to remove chip for the purpose of chip burn-in, replacement or field repairs.
-
公开(公告)号：EP0726698A2
公开(公告)日：1996-08-14
申请号：EP96100324.1
申请日：1996-01-11
发明人： Carey, Charles Francis , Fallon, Kenneth Michael , Markovich, Voya Rista , Powell, Douglas Oliver , Vlasak, Gary Paul , Zarr, Richard Stuart
CPC分类号： H01L24/81 , C25D5/022 , C25D5/08 , H01L21/4825 , H01L21/4853 , H01L2224/11849 , H01L2224/119 , H01L2224/81193 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/30105 , H01L2924/3841 , H05K3/241 , H05K3/3473 , H05K2203/043 , H05K2203/054 , H01L2924/00
摘要： Small, closely spaced deposits of solder materials may be formed with high volumetric accuracy and uniformity of shape by depositing a layer of conductive material (20) over surfaces of a dielectric layer (16) having apertures or recesses (e.g. blind apertures) and conductors and/or pads (14) exposed by those apertures or recesses, masking regions of the conductive material with a further patterned dielectric layer (30), electroplating solder materials (40) onto regions of the conductive material exposed by the mask, removing the mask (30) and portions of the conductive material (20) by selective etching and reflowing solder (40) away from at least a portion of the surfaces of the apertured dielectric layer (16). Uniformity of electroplating within blind apertures is enhanced by a combination of fluid jet sparging and cathode agitation. Excess conductor material in the resulting solder deposit can be avoided by replacing conductor material (20) with a constituent component of a solder material in an immersion bath prior to electroplating.
-
4.发明公开Systems interconnected by bumps of joining material 失效Systeme，die mittelsHöckerdes Verbindungsmaterialszusammengefügtwerden
公开(公告)号：EP0757386A2
公开(公告)日：1997-02-05
申请号：EP96305563.7
申请日：1996-07-30
IPC分类号： H01L23/485 , H01L23/498 , H01L21/48
CPC分类号： H01L24/12 , B23K1/0016 , B23K2201/40 , H01L21/4867 , H01L21/563 , H01L23/49805 , H01L23/49811 , H01L23/49827 , H01L24/11 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L2224/05001 , H01L2224/05027 , H01L2224/05184 , H01L2224/05572 , H01L2224/11003 , H01L2224/1132 , H01L2224/11334 , H01L2224/1182 , H01L2224/1184 , H01L2224/13006 , H01L2224/13011 , H01L2224/13099 , H01L2224/13111 , H01L2224/16225 , H01L2224/16237 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/742 , H01L2224/81136 , H01L2224/81191 , H01L2224/81193 , H01L2224/81801 , H01L2924/00011 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/15321 , H01L2924/15787 , H01L2924/16195 , H01L2924/181 , H01L2924/19043 , H01L2924/3511 , H01L2924/3841 , H05K3/321 , H05K3/3436 , H05K3/3463 , H05K3/3484 , H05K2201/035 , H05K2201/10734 , H05K2201/10992 , H05K2203/0113 , H05K2203/0338 , H05K2203/043 , H05K2203/0557 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2224/29099 , H01L2224/05624 , H01L2224/05147 , H01L2224/05166 , H01L2224/05171 , H01L2924/01004
摘要： A substrate is provided with vias communicating with surface contacts or bumps. Joining material paste is forced through holes in a screen onto an area array of the contacts on the substrate then the screen is biased against the substrate as the paste is heated and cooled to transfer the joining material onto the contacts. Alternately, joining material paste is forced into the screen and then a substrate is placed onto the screen with an area array of bump contacts of the substrate in contact with the solder paste, and then the paste is heated and cooled to transfer the material onto the bumps. The joining material may be a solder paste, conductive adhesive paste, or transient liquid bond paste. The substrate may be a semiconductor chip substrate, flexible or rigid organic substrate, or a metal substrate coated to form a dielectric surface. Also, the substrate may be a computer chip, chip carrier substrate or a circuit board substrate. The process may be used to produce flip chips, ball grid array modules, column grid array modules, circuit boards, and attachment structures of the preceding components including information handling systems.
摘要翻译： 衬底设有与表面接触或凸起连通的通孔。 连接材料浆料被迫通过筛网中的孔到基板上的触点的区域阵列上，然后当膏被加热和冷却以将接合材料转移到触点上时，屏幕被偏压抵靠基板。 或者，将接合材料糊剂强制进入筛网，然后将基板放置在具有与焊膏接触的基板的凸起接触的区域阵列的屏幕上，然后将该浆料加热并冷却以将材料转移到 颠簸。 接合材料可以是焊膏，导电粘合剂糊或瞬态液体粘合膏。 衬底可以是半导体芯片衬底，柔性或刚性有机衬底或涂覆以形成电介质表面的金属衬底。 此外，基板可以是计算机芯片，芯片载体基板或电路板基板。 该方法可用于制造包括信息处理系统的前述组件的倒装芯片，球栅阵列模块，列网格阵列模块，电路板和附接结构。
-
公开(公告)号：EP0726698A3
公开(公告)日：1996-11-20
申请号：EP96100324.1
申请日：1996-01-11
发明人： Carey, Charles Francis , Fallon, Kenneth Michael , Markovich, Voya Rista , Powell, Douglas Oliver , Vlasak, Gary Paul , Zarr, Richard Stuart
CPC分类号： H01L24/81 , C25D5/022 , C25D5/08 , H01L21/4825 , H01L21/4853 , H01L2224/11849 , H01L2224/119 , H01L2224/81193 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/30105 , H01L2924/3841 , H05K3/241 , H05K3/3473 , H05K2203/043 , H05K2203/054 , H01L2924/00
摘要： Small, closely spaced deposits of solder materials may be formed with high volumetric accuracy and uniformity of shape by depositing a layer of conductive material (20) over surfaces of a dielectric layer (16) having apertures or recesses (e.g. blind apertures) and conductors and/or pads (14) exposed by those apertures or recesses, masking regions of the conductive material with a further patterned dielectric layer (30), electroplating solder materials (40) onto regions of the conductive material exposed by the mask, removing the mask (30) and portions of the conductive material (20) by selective etching and reflowing solder (40) away from at least a portion of the surfaces of the apertured dielectric layer (16). Uniformity of electroplating within blind apertures is enhanced by a combination of fluid jet sparging and cathode agitation. Excess conductor material in the resulting solder deposit can be avoided by replacing conductor material (20) with a constituent component of a solder material in an immersion bath prior to electroplating.
摘要翻译： 通过在具有孔或凹陷（例如盲孔）和导体的介电层（16）的表面上沉积一层导电材料（20），可以形成具有高体积精度和形状均匀性的小的， /或由这些孔或凹槽暴露的焊盘（14），用另外的图案化介电层（30）掩蔽导电材料的区域，将焊料材料（40）电镀到由掩模暴露的导电材料的区域上，去除掩模 通过选择性地蚀刻并回流焊料（40）远离有孔介电层（16）的至少一部分表面，导电材料（20）和部分导电材料（20）。 流体喷射鼓泡和阴极搅拌相结合可以提高盲孔内电镀的均匀性。 在电镀之前，通过用浸渍浴中的焊料材料的组成成分替换导体材料（20），可以避免所得焊料沉积物中的过量导体材料。
-
-
-
-
搜索结果
5 条记录 (耗时 0.01 秒)
