公开(公告)号：EP2168161B1

公开(公告)日：2015-09-23

申请号：EP08768725.7

申请日：2008-06-23

申请人： SanDisk 3D LLC

发明人： HERNER, S., Brad ,  CLARK, Mark, H. ,  KUMAR, Tanmay

IPC分类号： H01L27/102 ,  H01L29/868 ,  G11C11/36 ,  H01L29/861 ,  H01L29/161 ,  H01L29/167 ,  H01L29/26

CPC分类号： H01L29/868 ,  G11C11/5692 ,  G11C17/06 ,  G11C17/16 ,  G11C17/165 ,  G11C2213/33 ,  G11C2213/71 ,  G11C2213/72 ,  H01L27/0688 ,  H01L27/1021 ,  H01L29/04 ,  H01L29/161 ,  H01L29/167 ,  H01L29/66136 ,  H01L29/8615

公开(公告)号：EP1946385A2

公开(公告)日：2008-07-23

申请号：EP06837153.3

申请日：2006-11-08

申请人： Sandisk 3D LLC

发明人： KUMAR, Tanmay ,  HERNER, S., Brad

IPC分类号： H01L29/861 ,  H01L29/868 ,  H01L21/329 ,  H01L29/167 ,  H01L27/102 ,  H01L27/12 ,  H01L21/84

CPC分类号： H01L27/1021 ,  H01L29/167 ,  H01L29/861

摘要： Use of antimony as an n-type conductivity-enhancing dopant in semiconductor structures having a vertical dopant profile is described. Dopants tend to diffuse, and steep dopant gradients can be difficult to maintain. Specifically, when a silicon layer is doped with phosphorus or arsenic, both n-type dopants, dopant atoms tend to seek the surface as undoped silicon is deposited on top of the n- doped layer, rising through the undoped silicon during deposition. Antimony does not have this tendency, and also diffuses more slowly than either phosphorus or arsenic, and this is advantageously used to dope such structures.

公开(公告)号：EP2130227B1

公开(公告)日：2013-05-15

申请号：EP08826319.9

申请日：2008-03-26

申请人： Sandisk 3d, Llc

发明人： HERNER, S., Brad

IPC分类号： H01L27/102

CPC分类号： H01L45/122 ,  B82Y10/00 ,  G11C13/0007 ,  G11C17/16 ,  G11C2213/16 ,  G11C2213/32 ,  G11C2213/71 ,  H01L27/1021 ,  H01L27/24 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/149 ,  H01L45/16 ,  Y10S977/742 ,  Y10S977/842

公开(公告)号：EP2168161A2

公开(公告)日：2010-03-31

申请号：EP08768725.7

申请日：2008-06-23

申请人： Sandisk 3D LLC

发明人： HERNER, S., Brad ,  CLARK, Mark, H. ,  KUMAR, Tanmay

IPC分类号： H01L27/102 ,  H01L29/868 ,  G11C11/36 ,  H01L29/861 ,  H01L29/161 ,  H01L29/167 ,  H01L29/26

CPC分类号： H01L29/868 ,  G11C11/5692 ,  G11C17/06 ,  G11C17/16 ,  G11C17/165 ,  G11C2213/33 ,  G11C2213/71 ,  G11C2213/72 ,  H01L27/0688 ,  H01L27/1021 ,  H01L29/04 ,  H01L29/161 ,  H01L29/167 ,  H01L29/66136 ,  H01L29/8615

摘要： A nonvolatile memory device includes at least one nonvolatile memory cell which comprises a silicon, germanium or silicon-germanium diode (2) which is doped with at least one of carbon or nitrogen in a concentration greater than an unavoidable impurity level concentration. The carbon and/or nitrogen is introduced for example into the intrinsic region (6) of a p-i-n diode (4,6,8).

公开(公告)号：EP2140492A1

公开(公告)日：2010-01-06

申请号：EP08742323.2

申请日：2008-03-26

申请人： Sandisk 3D LLC

发明人： HERNER, S., Brad ,  SCHEUERLEIN, Roy, E.

IPC分类号： H01L27/28 ,  H01L27/10 ,  H01L27/24 ,  G11C13/02 ,  H01L29/06 ,  H01L51/00

CPC分类号： H01L29/0673 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/72 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2454 ,  H01L27/2463 ,  H01L27/2481 ,  H01L29/0665 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/149 ,  H01L51/0048

摘要： A rewriteable nonvolatile memory cell is disclosed comprising a steering element in series with a carbon nanotube fabric. The steering element is preferably a diode, but may also be a transistor. The carbon nanotube fabric reversibly changes resistivity when subjected to an appropriate electrical pulse. The different resistivity states of the carbon nanotube fabric can be sensed, and can correspond to distinct data states of the memory cell. A first memory level of such memory cells can be monolithically formed above a substrate, a second memory level monolithically formed above the first, and so on, forming a highly dense monolithic three dimensional memory array of stacked memory levels. A method to form a rewriteable nonvolatile memory cell and numerous other aspects are also disclosed.

公开(公告)号：EP2162916B1

公开(公告)日：2013-03-20

申请号：EP08779800.5

申请日：2008-06-27

申请人： Sandisk 3D LLC

发明人： SCHRICKER, April ,  HERNER, S., Brad ,  KONEVECKI, Michael

IPC分类号： H01L21/822 ,  H01L27/10

CPC分类号： H01L27/101 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608

公开(公告)号：EP1952451A1

公开(公告)日：2008-08-06

申请号：EP06838165.6

申请日：2006-11-20

申请人： Sandisk 3D LLC

发明人： HERNER, S., Brad ,  KUMAR, Tanmay

IPC分类号： H01L45/00 ,  H01L27/24

CPC分类号： H01L45/145 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1675

摘要： A layer of resistivity-switching metal oxide or nitride can attain at least two stable resistivity states. Such a layer may be used in a state-change element in a nonvolatile memory cell, storing its data state, for example a '0' or a '1', in this resistivity state. Including additional metal atoms in a layer of such a resistivity-switching metal oxide or nitride compound decreases the current required to cause switching between resistivity states, reducing power requirements for an array of memory cells storing data in the resistivity state of such a layer. In various embodiments a memory cell may include a layer of resistivity-switching metal oxide or nitride compound with added metal formed in series with another element, such as a diode or a transistor.

公开(公告)号：EP1889294A1

公开(公告)日：2008-02-20

申请号：EP06760714.3

申请日：2006-06-06

申请人： Sandisk 3D LLC

发明人： HERNER, S., Brad ,  BANDYOPADHYAY, Abhijit

IPC分类号： H01L27/102 ,  G11C17/16

CPC分类号： G11C11/36 ,  G11C5/02 ,  G11C11/39 ,  G11C17/06 ,  G11C17/16 ,  H01L27/1021

摘要： A nonvolatile memory cell is described, the memory cell comprising a semiconductor diode (30). The semiconductor material making up the diode is formed with significant defect density between a bottom conductor (6) and a top conductor (22), and allows very low current flow at a typical read voltage. Application of a programming voltage permanently changes the nature of the semiconductor material, resulting in an improved diode. The programmed diode allows much higher current flow, in some embodiments one, two or three orders of magnitude higher, at the same read voltage. The difference in current allows a programmed memory cell to be distinguished from an unprogrammed memory cell. Fabrication techniques to generate an advantageous unprogrammed defect density are described. The memory cell of the present invention can be formed in a monolithic three dimensional memory array, having multiple stacked memory levels formed above a single substrate.

公开(公告)号：EP1880389A2

公开(公告)日：2008-01-23

申请号：EP06759137.0

申请日：2006-05-05

申请人： Sandisk 3D LLC

发明人： HERNER, S., Brad ,  KUMAR, Tanmay ,  PETTI, Christopher, J.

IPC分类号： G11C13/02 ,  H01L27/102 ,  H01L23/525 ,  H01L27/24 ,  G11C16/02

CPC分类号： H01L27/249 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/71 ,  G11C2213/72 ,  H01L27/101 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146

摘要： In a novel nonvolatile memory cell formed above a substrate, a diode is paired with a reversible resistance-switching material, preferably a metal oxide or nitride such as, for example, NixOy, NbxOy, TixOy, HfxOy, AlxOy, MgxOy, CoxOy, CrxOy, VxOy, ZnxOy, ZrxOy, BxNy, and AlxNy. In preferred embodiments, the diode is formed as a vertical pillar disposed between conductors. Multiple memory levels can be stacked to form a monolithic three dimensional memory array. In some embodiments, the diode comprises germanium or a germanium alloy, which can be deposited and crystallized at relatively low temperatures, allowing use of aluminum or copper in the conductors. The memory cell of the present invention can be used as a rewriteable memory cell or a one-time-programmable memory cell, and can store two or more data states.

公开(公告)号：EP2193545A2

公开(公告)日：2010-06-09

申请号：EP08836291.8

申请日：2008-09-26

申请人： Sandisk 3D LLC

发明人： HERNER, S., Brad ,  KUMAR, Tanmay

IPC分类号： H01L27/115

CPC分类号： H01L27/1021 ,  G11C17/16 ,  H01L23/5252 ,  H01L29/868 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a first aspect, a method for forming a non-volatile memory cell is provided. The method includes (1) forming a metal-insulator-metal (MIM) antifuse stack including (a) a first metal layer; (b) a silicon dioxide, oxynitride or silicon nitride antifuse layer formed above the first metal layer; and (c) a second metal layer formed above the antifuse layer. The method also includes (2) forming a contiguous p-i-n diode above the MIM stack, the contiguous p-i-n diode comprising deposited semiconductor material; (3) forming a layer of a suicide, silicide-germanide, or germanide in contact with the deposited semiconductor material; and (4) crystallizing the deposited semiconductor material in contact with the layer of suicide, silicide- germanide, or germanide. The memory cell comprises the contiguous p-i-n diode and the MIM stack. Other aspects are provided.