公开(公告)号：EP3273487A1

公开(公告)日：2018-01-24

申请号：EP16768439.8

申请日：2016-03-09

申请人： Tamura Corporation ,  National Institute of Information and Communication Technology ,  National University Corporation Tokyo University Of Agriculture and Technology

发明人： SASAKI, Kohei ,  GOTO, Ken ,  HIGASHIWAKI, Masataka ,  KOUKITU, Akinori ,  KUMAGAI, Yoshinao ,  MURAKAMI, Hisashi

IPC分类号： H01L29/872 ,  C23C16/40 ,  C30B29/16 ,  H01L21/329 ,  H01L29/24 ,  H01L29/47

CPC分类号： H01L29/872 ,  C23C16/40 ,  C23C16/4488 ,  C30B15/34 ,  C30B23/02 ,  C30B25/20 ,  C30B29/16 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02565 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02634 ,  H01L29/24 ,  H01L29/47 ,  H01L29/66969

摘要： [Problem]
To provide a Ga 2 O 3 -based high withstand voltage Schottky barrier diode having excellent withstand voltage characteristics. [Solution] According to one embodiment of the present invention, provided is a high withstand voltage Schottky barrier diode 1 having: a first layer 10, which is formed of a first Ga 2 O 3 -based single crystal containing a first Group IV element, and Cl at a concentration equal to or lower than 5×10 16 cm -3 , and which has an effective donor concentration not lower than 1×10 13 but not higher than 6.0×10 17 cm -3 ; a second layer 12, which is formed of a second Ga 2 O 3 -based single crystal containing a second Group IV element, and which has an effective donor concentration that is higher than that of the first layer 10, said second layer being laminated on the first layer 10; an anode electrode 14 formed on the first layer 10; and a cathode electrode 15 formed on the second layer 12.

摘要翻译： [问题]提供具有优异的耐电压特性的Ga 2 O 3基高耐压肖特基势垒二极管。 根据本发明的一个实施例，提供了一种高耐压肖特基势垒二极管1，其具有：第一层10，其由包含第一IV族元素的第一Ga 2 O 3基单晶形成， 等于或低于5×1016cm-3的浓度，并且具有不小于1×1013但不大于6.0×1017cm-3的有效施主浓度; 第二层12，其由包含第二IV族元素的第二基于Ga 2 O 3的单晶形成，并且具有比第一层10更高的有效施主浓度，所述第二层被层压在第一层上 10; 形成在第一层10上的阳极电极14; 和形成在第二层12上的阴极电极15。

公开(公告)号：EP3054037A1

公开(公告)日：2016-08-10

申请号：EP14849461.0

申请日：2014-09-18

申请人： Tamura Corporation ,  National University Corporation Tokyo University Of Agriculture and Technology

发明人： GOTO, Ken ,  SASAKI, Kohei ,  KOUKITU, Akinori ,  KUMAGAI, Yoshinao ,  MURAKAMI, Hisashi

IPC分类号： C30B29/16 ,  C23C16/40 ,  C23C16/448 ,  C30B25/14 ,  H01L21/365

CPC分类号： C30B25/165 ,  C23C16/40 ,  C23C16/4488 ,  C30B25/02 ,  C30B29/16 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/0259 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02634 ,  H01L29/04 ,  H01L29/24

摘要： Provided are: a method for efficiently growing a high-quality, large diameter β-Ga 2 O 3 -based single crystal film; and a crystalline layered structure having a β-Ga 2 O 3 -based single crystal film grown using this growing method. As one embodiment, the present invention provides a method for growing a β-Ga 2 O 3 -based single crystal film by using the HVPE method, and including a step for exposing a Ga 2 O 3 -based substrate (10) to a gallium chloride gas and an oxygen-containing gas, and growing a β-Ga 2 O 3 -based single crystal film (12) on the principal surface (11) of the Ga 2 O 3 -based substrate (10) at a growing temperature of 900° C or higher.

摘要翻译： 本发明提供：用于有效地生长高质量的方法，大直径²-的Ga 2 O 3系单晶膜; 和具有使用该生长方法生长的²-的Ga 2 O 3系单晶膜的结晶层状结构。 作为一个实施例，本发明提供了一种方法，用于通过利用HVPE法生长²-的Ga 2 O 3系单晶的电影，并且包括用于曝光的Ga 2 O 3系基材（10），以镓的工序 氯化物气体和基底物在生长温度气体，和Ga的2 O 3（10）的主表面（11）上生长²-的Ga 2 O 3系单晶膜（12）的含氧 900℃或更高。

公开(公告)号：EP3933935A1

公开(公告)日：2022-01-05

申请号：EP21187580.2

申请日：2016-03-09

申请人： Tamura Corporation ,  National Institute of Information and Communications Technology ,  National University Corporation Tokyo University Of Agriculture and Technology

发明人： SASAKI, Kohei ,  GOTO, Ken ,  HIGASHIWAKI, Masataka ,  KOUKITU, Akinori ,  KUMAGAI, Yoshinao ,  MURAKAMI, Hisashi

IPC分类号： H01L29/872 ,  H01L21/329 ,  H01L29/24 ,  C23C16/40 ,  C30B29/16 ,  H01L21/02 ,  H01L29/47

摘要： [Problem] To provide a Ga 2 O 3 -based high withstand voltage Schottky barrier diode having excellent withstand voltage characteristics. [Solution] According to one embodiment of the present invention, provided is a high withstand voltage Schottky barrier diode 1 having: a first layer 10, which is formed of a first Ga 2 O 3 -based single crystal containing a first Group IV element, and Cl at a concentration equal to or lower than 5×10 16 cm -3 , and which has an effective donor concentration not lower than 1×10 13 but not higher than 6.0×10 17 cm -3 ; a second layer 12, which is formed of a second Ga 2 O 3 -based single crystal containing a second Group IV element, and which has an effective donor concentration that is higher than that of the first layer 10, said second layer being laminated on the first layer 10; an anode electrode 14 formed on the first layer 10; and a cathode electrode 15 formed on the second layer 12.

公开(公告)号：EP2765612A1

公开(公告)日：2014-08-13

申请号：EP12829607.6

申请日：2012-09-07

申请人： Tamura Corporation ,  National Institute of Information and Communication Technology

发明人： SASAKI, Kohei ,  HIGASHIWAKI, Masataka

IPC分类号： H01L29/786 ,  H01L21/20 ,  H01L21/336 ,  H01L21/338 ,  H01L29/26 ,  H01L29/812

CPC分类号： H01L29/7869 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02581 ,  H01L21/02631 ,  H01L29/04 ,  H01L29/045 ,  H01L29/157 ,  H01L29/24 ,  H01L29/36 ,  H01L29/365 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/772 ,  H01L29/78 ,  H01L29/7816 ,  H01L29/7824 ,  H01L29/78603 ,  H01L29/812 ,  H01L29/8126

摘要： Provided is a high-quality Ga 2 O 3 semiconductor element. Provided is a Ga 2 O 3 MISFET (20), which includes: an n-type β-Ga 2 O 3 single crystal film (3), which is formed on a high-resistance β-Ga 2 O 3 substrate (2) directly or with other layer therebetween; a source electrode (22) and a drain electrode (23), which are formed on the n-type β-Ga 2 O 3 single crystal film (3); and a gate electrode (21), which is formed on the n-type β-Ga 2 O 3 single crystal film (3) between the source electrode (22) and the drain electrode (23).

摘要翻译： 提供了高质量的Ga 2 O 3半导体元件。 提供了一种Ga 2 O 3 MISFET（20），其包括：形成在高电阻²-Ga 2 O 3衬底（2）上的n型Λ-Ga 2 O 3单晶膜（3） 直接或与其间的其它层; 形成在n型²-Ga 2 O 3单晶膜（3）上的源电极（22）和漏电极（23）。 以及形成在源电极（22）和漏电极（23）之间的n型²-Ga 2 O 3单晶膜（3）上的栅电极（21）。

公开(公告)号：EP3761374A1

公开(公告)日：2021-01-06

申请号：EP19761259.1

申请日：2019-02-25

申请人： Tamura Corporation ,  Novel Crystal Technology, Inc. ,  TDK Corporation

发明人： SASAKI, Kohei ,  FUJITA, Minoru ,  HIRABAYASHI, Jun ,  ARIMA, Jun

IPC分类号： H01L29/872 ,  C30B29/16 ,  C30B33/08 ,  H01L21/329 ,  H01L29/41 ,  H01L29/47 ,  H01L29/861 ,  H01L29/868 ,  H01L29/94

摘要： Provided is a trench MOS Schottky diode 1 which is provided with: a first semiconductor layer 10 that is formed from a Ga 3 O 3 single crystal; a second semiconductor layer 11 that is formed from a Ga 3 O 3 single crystal and has a trench 12; an anode electrode 13; a cathode electrode 14; an insulating film 15; and a trench electrode 16. This trench MOS Schottky diode 1 is configured such that the second semiconductor layer 11 has an insulating dry etching damaged layer 11a, which has a thickness of 0.8 µm or less, in a region that includes the inner surface of the trench 12.

公开(公告)号：EP3588580A1

公开(公告)日：2020-01-01

申请号：EP18757087.4

申请日：2018-02-27

申请人： Tamura Corporation ,  Novel Crystal Technology, Inc.

发明人： SASAKI, Kohei ,  HIGASHIWAKI, Masataka

IPC分类号： H01L29/872 ,  H01L29/06 ,  H01L29/20 ,  H01L29/47

摘要： One embodiment of the present invention provides a trench MOS Schottky diode 1 which is provided with: a first semiconductor layer 10 which is formed from a Ga 2 O 3 single crystal; a second semiconductor layer 11 which is laminated on the first semiconductor layer 10 and has a trench 12 that opens to a surface 17, while being formed from a Ga 2 O 3 single crystal; an anode electrode 13 which is formed on the surface 17; a cathode electrode 14 which is formed on a surface of the first semiconductor layer 10, said surface being on the reverse side of the second semiconductor layer 11-side surface; an insulating film 15 which covers the inner surface of the trench 12 of the second semiconductor layer 11; and a trench MOS gate 16 which is buried within the trench 12 of the second semiconductor layer 11 so as to be covered by the insulating film 15, while being in contact with the anode electrode 13. The second semiconductor layer 11 is configured from: a lower layer 11b which is on the first semiconductor layer side; and an upper layer 11a which is on the anode electrode 13 side, while having a higher donor concentration than the lower layer 11b.

公开(公告)号：EP2755231B1

公开(公告)日：2019-05-22

申请号：EP12829259.6

申请日：2012-08-02

申请人： Tamura Corporation

发明人： SASAKI, Kohei

IPC分类号： H01L21/425 ,  H01L29/24

公开(公告)号：EP3178972A1

公开(公告)日：2017-06-14

申请号：EP15829189.8

申请日：2015-08-06

申请人： Tamura Corporation

发明人： SASAKI, Kohei

IPC分类号： C30B29/16

CPC分类号： C30B29/16

摘要： Provided is a Ga 2 O 3 -based single crystal substrate capable of achieving a high processing yield. A Ga 2 O 3 -based single crystal substrate having a crack density of less than 0.05 cracks/cm can be obtained that has as a principal surface thereof a surface rotated 10-150° from the (100) plane, when a rotation direction from the (100) plane to the (001) plane via the (101) plane is defined as positive, having the [010] axis as the rotation axis.

摘要翻译： 本发明提供能够实现高处理成品率的Ga 2 O 3系单晶基板。 （100）面的旋转方向为（100）面的情况下，可以得到裂纹密度小于0.05个裂纹/ cm的Ga2O3系单晶基板，该单晶基板的主面为从（100）面旋转10〜150°的面 ）平面经由（101）平面到（001）平面的距离被定义为正值，具有[010]轴作为旋转轴。

公开(公告)号：EP4404276A1

公开(公告)日：2024-07-24

申请号：EP22869716.5

申请日：2022-08-03

申请人： Tamura Corporation ,  Novel Crystal Technology, Inc.

发明人： TAKATSUKA, Akio ,  SASAKI, Kohei

IPC分类号： H01L29/868 ,  H01L29/201 ,  H01L29/861

CPC分类号： H01L29/868 ,  H01L29/201 ,  H01L29/861

摘要： Provided is a p-n junction diode which can achieve both of the achievement of a low turn-on voltage and the reduction in a leak current even when the p-n junction diode has a simple structure. In one embodiment, a p-n junction diode 1 is provided, which is provided with an n-type semiconductor layer 11 that is composed of a single crystal of an n-type semiconductor having a chemical composition represented by the formula: (GaxAlyIn1-x-y)2O3 (0

公开(公告)号：EP4383315A1

公开(公告)日：2024-06-12

申请号：EP22853114.1

申请日：2022-08-03

申请人： Tamura Corporation ,  Novel Crystal Technology, Inc.

发明人： SASAKI, Kohei ,  LIN, Chia-Hung

IPC分类号： H01L21/365 ,  C23C16/40 ,  C30B25/02 ,  C30B29/16 ,  H01L21/20 ,  H01L29/24

CPC分类号： C23C16/40 ,  C30B25/02 ,  C30B29/16 ,  H01L21/02107 ,  H01L21/20 ,  H01L29/24

摘要： Provided is a gallium oxide-based semiconductor substrate configured to allow the formation, by HVPE, of a gallium oxide-based epitaxial film having a small film thickness distribution, a small donor concentration distribution, and a low crystal defect density. Also provided are a semiconductor wafer including the semiconductor substrate and the epitaxial film, and a method for manufacturing the semiconductor wafer. As one embodiment, provided is a semiconductor substrate 10 in which at least one main surface thereof is a crystal growth base surface 11. The semiconductor substrate 10 comprises a single crystal of a gallium oxide-based semiconductor. The growth base surface 11 is the (001) plane. In a continuous region of 70 area% or more of the growth base surface 11, the off angle in the [010] direction is in the range from greater than -0.3° to -0.01°, or in the range from 0.01° to smaller than 0.3°. In said region of the growth base surface 11, the off angle in the [001] direction is in the range from -1° to 1°. The diameter of the semiconductor substrate 10 is 2 inches or more.