公开(公告)号：EP1206171A2

公开(公告)日：2002-05-15

申请号：EP01126238.3

申请日：2001-11-05

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： Suzuki, Takeshi ,  Nishi, Toshihiro ,  Tomekawa, Satoru ,  Echigo, Fumio

IPC: H05K3/40 ,  H05K3/46

CPC classification number: H05K3/4069 ,  H05K1/0366 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0047 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0287 ,  H05K2201/029 ,  H05K2201/0355 ,  H05K2201/094 ,  H05K2203/1461 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322 ,  Y10T428/24802 ,  Y10T428/24917 ,  Y10T428/24994 ,  Y10T428/249953

Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet (101) with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes (104) provided in a high-density portion of the reinforcer sheet (101) are formed to have a smaller cross-section than the inner via holes (103) provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass cloth formed of warps (102b) and wefts (102a) is used for an insulator layer.

Abstract translation: 电路板包括：由其面内方向密度分布的加强片（101）形成的电绝缘体层，填充在电绝缘体层的厚度方向上的多个内部通孔中的电导体，以及 布线层连接到电导体。 设置在加强片（101）的高密度部分中的内部通孔（104）形成为具有比设置在加强片的低密度部分中的内部通孔（103）更小的横截面。 以这种方式，可以提供一种能够实现高密度布线的电路板和具有较小变化的内部通孔连接电阻，当包括在其面内方向上具有密度分布的增强片的基材 用于经线（102b）和纬纱（102a）形成的玻璃布用于绝缘体层。

公开(公告)号：EP0655183B1

公开(公告)日：1997-07-09

申请号：EP93917736.6

申请日：1993-08-03

Applicant: AMP-Akzo LinLam VOF

Inventor： MIDDELMAN, Erik ,  ZUURING, Pieter, Hendrik

IPC: H05K3/46

CPC classification number: B32B37/12 ,  H05K1/0366 ,  H05K3/386 ,  H05K3/4626 ,  H05K2201/0195 ,  H05K2201/0287

Abstract: A process for manufacturing a multi-layer printed wire board, also referred to as a multilayer, comprising at least two electrically insulating substrates with electrically conductive traces or layers provided on at least three surfaces thereof, in which process, by means of lamination under pressure, a cured basic substrate based on a UD-reinforced synthetic material, provided on either side with traces, is combined with and bonded to a back-up substrate, wherein during the laminating process the back-up substrate is added to the basic substrate, the base substrate and the back-up substrate comprising a UD-reinforced cured core layer, the base substrate having been provided at least on the side facing the back-up substrate with a still plastically deformable (flowable) adhesive layer, and such a pressure is exerted on the laminate as to bring said back-up substrate into contact or practically into contact with the conducting traces of the basic substrate, and the space between these traces is filled with the adhesive material, so bonding the basic substrate and the back-up substrate.

公开(公告)号：EP0326577B1

公开(公告)日：1996-12-11

申请号：EP87907042.3

申请日：1987-09-10

Applicant: COMPOSITECH LTD.

Inventor： MEDNEY, Jonas ,  KLIMPL, Fred E.

IPC: B32B5/12 ,  B32B31/00 ,  B31C13/00 ,  H05K3/46

CPC classification number: B29C70/347 ,  B29C53/564 ,  B29C53/58 ,  B29C53/76 ,  B29C53/8016 ,  B29C53/821 ,  B29C70/202 ,  B29C2793/009 ,  B29L2031/3425 ,  H05K1/0366 ,  H05K3/0047 ,  H05K3/4626 ,  H05K2201/0145 ,  H05K2201/0278 ,  H05K2201/0287 ,  H05K2203/085 ,  H05K2203/1327 ,  Y10S428/901 ,  Y10T29/49158 ,  Y10T29/49176 ,  Y10T428/24074

Abstract: A warp-free laminate is produced by winding a first set of strands or filaments (34) about a flat mandrel with a second set of strands (36) being wound transverse to the first set. The two sets may be perpendicular to each other. The filaments are maintained under a controlled tension while being impregnated with a resin and during subsequent cure of the resin. In order to permit the formation of a warp-free product, the winding pattern is such that it forms a mirror image about a neutral axis or plane of symmetry. The winding pattern may be chosen to provide interstices in a predetermined pattern permitting punching out or high speed drilling of hole openings (106, 108, 110, 112, 114) for subsequent printed circuit applications.

公开(公告)号：EP0651696A1

公开(公告)日：1995-05-10

申请号：EP93915962.0

申请日：1993-07-20

Applicant: Akzo Nobel N.V.

Inventor： MIDDELMAN, Erik ,  ZUURING, Pieter, Hendrick

IPC: B32B15 ,  B29C70 ,  B32B5 ,  B32B17 ,  B32B37 ,  H05K1 ,  H05K3

CPC classification number: B32B37/02 ,  B29C70/083 ,  B29C70/202 ,  B29C70/504 ,  B29K2105/0845 ,  B29K2105/108 ,  B29L2031/3425 ,  B32B37/1027 ,  B32B37/226 ,  B32B2305/10 ,  B32B2457/08 ,  H05K1/0366 ,  H05K3/022 ,  H05K3/4626 ,  H05K2201/0287 ,  Y10S428/901 ,  Y10T156/1084 ,  Y10T428/24074 ,  Y10T428/24132 ,  Y10T428/24802 ,  Y10T428/24917

Abstract: The invention relates to a method of manufacturing a composite laminate, preferably a cross-ply laminate, in which process unidirectionally oriented (UD) fibres (3) are provided with matrix material (7) and, together with a pre-formed non-flowing UD composite or cross-ply laminate, passed through a laminating zone (13) in layers of at least two different orientational directions. More particularly, the invention relates to the manufacture of composite material which is pre-eminently suited to be used as a supporting substrate for printed wire boards. The method according to the invention is directed in particular to the utilisation of a double belt press, both for making the pre-formed non-flowing UD composite and for the manufacture of the final laminate. The invention also comprises printed wire boards (PWBs) and multilayer PWBs.

公开(公告)号：EP1360067B1

公开(公告)日：2007-02-21

申请号：EP01990176.8

申请日：2001-12-11

Applicant: C-Core Technologies Inc.

Inventor： VASOYA, Kalu, K. ,  MANGROLIA, Bharat, M. ,  DAVIS, William, E. ,  BOHNER, Richard, A.

IPC: B32B5/26 ,  B32B27/04 ,  B32B27/12 ,  D03D15/00

CPC classification number: B32B27/12 ,  B32B5/26 ,  B32B27/04 ,  B32B2260/021 ,  B32B2262/101 ,  B32B2262/106 ,  B32B2307/202 ,  B32B2307/302 ,  B32B2457/00 ,  C08K3/38 ,  C08K9/08 ,  C08K2003/385 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/0278 ,  H05K2201/0287 ,  H05K2201/0323 ,  Y10S428/901 ,  Y10T29/49124 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/24994 ,  Y10T428/249942 ,  Y10T428/249945 ,  Y10T428/249946 ,  Y10T428/249947 ,  Y10T428/249951 ,  Y10T428/249952 ,  Y10T428/25 ,  Y10T428/292 ,  Y10T428/31504 ,  Y10T442/117 ,  Y10T442/2418

Abstract: Prepregs (124), laminates (120, 122), printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins (132). In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.

公开(公告)号：EP0820540B1

公开(公告)日：2000-04-05

申请号：EP96943980.1

申请日：1996-12-17

Applicant: GIVIDI ITALIA S.p.A.

Inventor： SCARI', Diego ,  SCARI', Marco

IPC: D03D15/00 ,  D03D19/00 ,  H05K1/03

CPC classification number: H05K1/0366 ,  D03D15/0011 ,  D03D19/00 ,  H05K2201/0287 ,  H05K2201/029 ,  Y10S428/901 ,  Y10T442/102 ,  Y10T442/3065 ,  Y10T442/3309

Abstract: The present invention relates to a unidirectional glass fabric produced with continuous yarn (2, 3) which is twisted, plied or has zero twisting turns, with different gram weights and interlaced with thin glass yarns (3) as a stabilizing binding, use thereof in the manufacture of printed circuits and in numerous other industrial applications, and a method for the manufacture thereof.

公开(公告)号：EP0582197A2

公开(公告)日：1994-02-09

申请号：EP93112070.3

申请日：1993-07-28

Applicant: Siemens Nixdorf Informationssysteme Aktiengesellschaft

Inventor： Neumann, Rudolf, Dipl.-Ing.

IPC: D03D1/00 ,  D03D15/00 ,  H05K1/03 ,  B29C67/14

CPC classification number: H05K1/0366 ,  B29C70/22 ,  D03D1/0082 ,  D03D15/00 ,  D10B2101/06 ,  D10B2505/02 ,  H05K2201/0287 ,  H05K2201/029

Abstract: Die Erfindung bezieht sich auf Basismaterialien und Prepregs aus Epoxidharzglasfasergewebe zur Herstellung von Leiterplatten. Die Dimensionsstabilität von Basismaterial und Prepreg ist je nach Typ unterschiedlich. Diese Unterschiedlichkeit wird durch Temperprozesse über den Glasumwandlungspunkt und Vorhaltewerte bei den Druckwerkzeugen zu kompensieren versucht. Durch die Erfindung soll die Dimensionsstabilität derartiger Materialien verbessert werden. Durch die Verwendung von unidirektionalen Geweben, bei denene das Verhältnis der Glasstränge in Kett- und Schußrichtung oder umgekehrt größer 70:30 und/oder das Verhältnis der Garngewichte in Kett- und Schußrichtung oder umgekehrt größer 1,5:1 beträgt, und/oder als Webart Satinbindung realisiert wird, wird eine deutliche Verbesserung der Dimensionsstabilität bei nur geringfügig erhöhten Kosten erzielt.

Abstract translation: 本发明涉及用于制造电路板的环氧树脂玻璃纤维织物的基础（基本）材料和预浸料。 基材和预浸料的尺寸稳定性根据类型而不同。 尝试最小化这种差异是高于玻璃化转变点的热处理（回火）过程和应用于生产主机（压制工具）的校正因子。 本发明是为了提高这种材料的尺寸稳定性。 使用单向织物，其中经纱和纬向方向上的玻璃纤维束的比例反之亦然，大于70:30和/或纬纱和纬纱方向上的纱线重量之比（反之亦然）较大 超过1.5：1，和/或具有缎面结构，在最小的成本增加的情况下，可以显着提高尺寸稳定性。

公开(公告)号：EP0374319A1

公开(公告)日：1990-06-27

申请号：EP88312208.7

申请日：1988-12-22

Applicant: TRW INC.

Inventor： Leibowitz, Joseph D.

IPC: H05K3/46 ,  H05K1/03 ,  B29C67/14 ,  B29B15/10 ,  B29C53/56

CPC classification number: H05K1/0366 ,  H05K3/4626 ,  H05K2201/0154 ,  H05K2201/0195 ,  H05K2201/0278 ,  H05K2201/0287 ,  H05K2201/068 ,  Y10S428/901 ,  Y10T428/2905

Abstract: A multilayer printed circuit board in which multiple layers of a composite material (16), fabricated by the lay-up of an aramid fiber tape (22,26,28,24), are employed to provide a circuit board with a desired coefficient of thermal expansion.

Abstract translation: 一种多层印刷电路板，其中使用通过叠层芳族聚酰胺纤维带（22,26,28,24）制成的多层复合材料（16），以提供具有所需系数的电路板 热膨胀。

公开(公告)号：EP0309982A2

公开(公告)日：1989-04-05

申请号：EP88115864.6

申请日：1988-09-27

Applicant: E.I. DU PONT DE NEMOURS AND COMPANY

Inventor： Bolt, John Davis ,  Button, Daniel Paul ,  Yost, Bruce Allen

IPC: C08J5/24 ,  H05K1/03 ,  H01L23/14

CPC classification number: C08J5/044 ,  B32B27/04 ,  H01L23/145 ,  H01L23/3737 ,  H01L2924/0002 ,  H05K1/0366 ,  H05K2201/0287 ,  H05K2201/029 ,  H05K2201/0293 ,  H05K2201/068 ,  H01L2924/00

Abstract: A composite containing high purity crystal­line ceramic fibers in a polymeric matrix, suitable for use as a microelectronic device package or circuit board. The composite exhibits high thermal conducti­vity, and low coefficients of thermal expansion in-­plane, and moderate thermal conductivities and low dielectric constants out-of-plane.

Abstract translation: 在聚合物基质中含有高纯度结晶陶瓷纤维的复合材料，适合用作微电子器件封装或电路板。 该复合材料具有高导热性和低平面内的热膨胀系数，以及适度的热导率和低介电常数。

公开(公告)号：EP1206171B1

公开(公告)日：2007-02-14

申请号：EP01126238.3

申请日：2001-11-05

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Suzuki, Takeshi ,  Nishi, Toshihiro ,  Tomekawa, Satoru ,  Echigo, Fumio

IPC: H05K3/40 ,  H05K3/46

CPC classification number: H05K3/4069 ,  H05K1/0366 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0047 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0287 ,  H05K2201/029 ,  H05K2201/0355 ,  H05K2201/094 ,  H05K2203/1461 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322 ,  Y10T428/24802 ,  Y10T428/24917 ,  Y10T428/24994 ,  Y10T428/249953