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公开(公告)号：US12290001B2
公开(公告)日：2025-04-29
申请号：US18526636
申请日：2023-12-01
Applicant: Everspin Technologies, Inc.
Inventor： Sanjeev Aggarwal , Sarin A. Deshpande , Kerry Joseph Nagel
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
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公开(公告)号：US20250113741A1
公开(公告)日：2025-04-03
申请号：US18897637
申请日：2024-09-26
Applicant: Everspin Technologies, Inc.
Inventor： Sumio IKEGAWA , Kerry Joseph NAGEL , Raj KUMAR , Syed M. ALAM
Abstract: A magnetoresistive random-access memory (MRAM) device includes a magnetoresistive tunnel junction (MTJ) device, an electrode, and a coupling layer. The MTJ device includes a free layer, a fixed layer, and a tunnel barrier layer positioned between the free layer and the fixed layer. The coupling layer is positioned between and coupling the electrode and the MTJ device. The coupling layer includes spin Hall channel (SHC) material. The free layer, the fixed layer, and the tunnel barrier layer are stacked in a first direction to form MTJ device. The electrode is nonaligned with the MTJ device such that the electrode is spaced away from the MTJ in a second direction that is different from the first direction.
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公开(公告)号：USRE50331E1
公开(公告)日：2025-03-04
申请号：US17658470
申请日：2022-04-08
Applicant: Everspin Technologies, Inc.
Inventor： Renu Whig , Jijun Sun , Nicholas Rizzo , Jon Slaughter , Dimitri Houssameddine , Frederick Mancoff
Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.
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公开(公告)号：US20250061933A1
公开(公告)日：2025-02-20
申请号：US18934463
申请日：2024-11-01
Applicant: Everspin Technologies, Inc.
Inventor： Syed M. ALAM , Yaojun ZHANG , Frederick NEUMEYER
IPC: G11C11/16
Abstract: The present disclosure is drawn to a magnetoresistive device including an array of memory cells arranged in rows and columns, each memory cell comprising a magnetic tunnel junction, each row comprising a word line, and each column comprising a bit line; a column select device that selects a bit line. The magnetoresistive device also includes a sense amplifier comprising a first input corresponding to a selected bit line, a second input corresponding to a reference bit line, and a data output. The plurality of columns comprise a reference column, the reference column comprising a conductive element coupled to the magnetic tunnel junctions in the reference column.
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公开(公告)号：US12181539B2
公开(公告)日：2024-12-31
申请号：US18622584
申请日：2024-03-29
Applicant: Everspin Technologies, Inc.
Inventor： Phillip G. Mather , Anuraag Mohan
IPC: G01R33/09
Abstract: Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing. The improvements may be done by reducing parasitic effects, increasing sense element packing density, interleaving a Z-axis layout to reduce a subtractive effect, and optimizing an alignment between a Z-axis sense element and a flux guide, etc.
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Patent Agency Ranking
公开(公告)号：US12052928B2
公开(公告)日：2024-07-30
申请号：US17397067
申请日：2021-08-09
Applicant: Everspin Technologies, Inc.
Inventor： Jijun Sun
CPC classification number: H10N50/10 , G11C11/161 , H01F10/3254 , H01F10/3272 , H10B61/20 , H10N50/80 , H10N50/85
Abstract: A magnetoresistive stack may include: a fixed region having a fixed magnetic state, a spacer region, a first dielectric layer and a second dielectric layer, where both the first dielectric layer and the second dielectric layer are between the fixed region and the spacer region, and a free region between the first dielectric layer and the second dielectric layer. The free region may be configured to have a first magnetic state and a second magnetic state. The free region may include an interface layer, a multilayer structure, an insertion layer (e.g., a metallized insertion layer), one or more ferromagnetic layers (e.g., metallized ferromagnetic layers), and/or a transition layer (e.g., a metallized transition layer).
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公开(公告)号：US12020770B2
公开(公告)日：2024-06-25
申请号：US18189738
申请日：2023-03-24
Applicant: Everspin Technologies, Inc.
Inventor： Syed M. Alam
CPC classification number: G11C7/1069 , G11C5/146 , G11C7/1045 , G11C7/1096
Abstract: 1. The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.
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公开(公告)号：US20240188449A1
公开(公告)日：2024-06-06
申请号：US18438174
申请日：2024-02-09
Applicant: Everspin Technologies, Inc.
Inventor： Han-Jong CHIA
CPC classification number: H10N50/80 , G11C11/161 , G11C11/1675 , H01F10/3272 , H01F10/3286 , H01F10/329 , H10B61/22 , H10N50/85
Abstract: Spin-orbit-torque (SOT) segments are provided along the sides of free layers in magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SOT segments injects spin current into the free layers such that spin torque is applied to the free layers. The spin torque can be used as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction in order to improve the efficiency of the switching current applied to the magnetoresistive device.
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公开(公告)号：US20230380297A1
公开(公告)日：2023-11-23
申请号：US18360564
申请日：2023-07-27
Applicant: Everspin Technologies, Inc.
Inventor： Jijun SUN , Jon SLAUGHTER , Renu WHIG
Abstract: A magnetically free region of magnetoresistive device includes at least a first ferromagnetic region and a second ferromagnetic region separated by a non-magnetic insertion region. At least one of the first ferromagnetic region and the second ferromagnetic region may include at least a boron-rich ferromagnetic layer positioned proximate a boron-free ferromagnetic layer.
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公开(公告)号：US20230243898A1
公开(公告)日：2023-08-03
申请号：US18298646
申请日：2023-04-11
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor： Phillip G. MATHER , Anuraag MOHAN
IPC: G01R33/09
CPC classification number: G01R33/093 , G01R33/098
Abstract: Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing. The improvements may be done by reducing parasitic effects, increasing sense element packing density, interleaving a Z-axis layout to reduce a subtractive effect, and optimizing an alignment between a Z-axis sense element and a flux guide, etc.
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