公开(公告)号：US12259963B2

公开(公告)日：2025-03-25

申请号：US17676890

申请日：2022-02-22

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Boris Pismenny ,  Miriam Menes ,  Ahmad Atamli ,  Ilan Pardo ,  Ariel Shahar ,  Uria Basher

IPC: G06F21/53 ,  G06F9/50 ,  G06F13/28 ,  G06F21/79

Abstract: A confidential computing (CC) apparatus includes a CPU and a peripheral device. The CPU is to run a hypervisor that hosts one or more Trusted Virtual Machines (TVMs). The peripheral device is coupled to the CPU and to an external memory. The CPU includes a TVM-Monitor (TVMM), to perform management operations on the one or more TVMs, to track memory space that is allocated by the hypervisor to the peripheral device in the external memory, to monitor memory-access requests issued by the hypervisor to the memory space allocated to the peripheral device in the external memory, and to permit or deny the memory-access requests, according to a criterion.

公开(公告)号：US12256084B2

公开(公告)日：2025-03-18

申请号：US18096424

申请日：2023-01-12

Applicant: Mellanox Technologies, Ltd.

Inventor： Eshed Ram ,  Dotan David Levi ,  Assaf Hallak ,  Shie Mannor ,  Gal Chechik ,  Eyal Frishman ,  Ohad Markus ,  Dror Porat ,  Assaf Weissman

IPC: H04N7/12 ,  H04N19/149 ,  H04N19/154 ,  H04N19/172

Abstract: A system includes a processing device to receive a video content, a quality metric, and a target bit rate for encoding the video content. The system includes encoding hardware to perform frame encoding on the video content and a controller coupled between the processing device and the encoding hardware. The controller is programmed with machine instructions to generate first QP values on a per-frame basis using a frame machine learning model with a first plurality of weights. The first plurality of weights depends at least in part on the quality metric and the target bit rate. The controller is further programmed to provide the first QP values to the encoding hardware for rate control of the frame encoding.

公开(公告)号：US12255670B2

公开(公告)日：2025-03-18

申请号：US17890337

申请日：2022-08-18

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Vladimir Shalikashvili ,  Ran Sandhaus

IPC: H03M7/30 ,  G06F3/06 ,  G06F9/50 ,  G06F12/16

Abstract: A data compression system comprising computer memory to store plural compression algorithms and a hardware processor to apply compression algorithm/s to incoming data items, wherein the compression algorithm to be applied to individual data item/s from among the incoming data items is selected, from among the plural compression algorithms, by the hardware processor, depending at least on the individual data item.

公开(公告)号：US12255439B2

公开(公告)日：2025-03-18

申请号：US17540440

申请日：2021-12-02

Applicant: MELLANOX TECHNOLOGIES, LTD. ,  BAR-ILAN UNIVERSITY

Inventor： Dimitrios Kalavrouziotis ,  Paraskevas Bakopoulos ,  Elad Mentovich ,  Anna Sandomirsky ,  Boaz Atias ,  Doron Naveh ,  Eilam Zigi Ben Smolinsky ,  Adi Levi ,  Rana Darweesh

IPC: H01S5/10 ,  H01S5/02 ,  H01S5/026 ,  H01S5/042 ,  H01S5/30

Abstract: A light emitting device, a transmitter, and a silicon photonics chip, among other things, are disclosed. An illustrative light emitting device is disclosed to include a silicon substrate, a waveguide disposed on or integrated in the silicon substrate, where the waveguide includes a wide waveguide section at a first end and a narrow waveguide section at a second end, a first metal pad disposed over the wide waveguide section and at least partially across the first end of the waveguide, and a second metal pad disposed over the wide waveguide section, distanced away from the first metal pad. Electrical current passing between the first metal pad and the second metal pad may cause light to be produced in the wide waveguide section and the light produced in the wide waveguide section is at least partially reflected by the first metal pad and directed to the narrow waveguide section for transmission.

公开(公告)号：US12253954B1

公开(公告)日：2025-03-18

申请号：US18459047

申请日：2023-08-31

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ariel Shahar ,  Shay Ben-Haim ,  Eyal Davidovitz ,  Oz Woller

IPC: G06F12/10 ,  G06F12/0882 ,  G06F12/1009

Abstract: In one embodiment, a processing device includes a memory to store a plurality of memory pages having corresponding physical memory addresses in the memory, store an active multilevel page table (MPT) mapping virtual to physical memory addresses for corresponding allocated memory pages stored in the memory, and store a floating MPT at least partially mapping virtual to physical memory addresses for corresponding spare memory pages stored in the memory, the floating and active MPT using a common mapping scheme, and a processor to receive a request to add a virtual to physical address mapping for more memory pages of the plurality of memory pages to the active MPT, and in response to receiving the request, adjoin at least part of the floating MPT to the active MPT so that the active MPT provides the virtual to physical address mapping for at least some memory pages of the spare memory pages.

公开(公告)号：US12248416B2

公开(公告)日：2025-03-11

申请号：US18655386

申请日：2024-05-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Eliav Bar-Ilan ,  Ran Avraham Koren ,  Liran Liss ,  Oren Duer ,  Shahaf Shuler

IPC: G06F13/28 ,  G06F13/42

Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.

公开(公告)号：US20250080616A1

公开(公告)日：2025-03-06

申请号：US18242637

申请日：2023-09-06

Applicant: Mellanox Technologies, Ltd.

Inventor： Avi URMAN ,  Ariel SHAHAR ,  Najeeb DARAWSHY

IPC: H04L67/143

Abstract: Apparatus and method for improved network resource management are described herein. An example computing apparatus comprises a network adapter configured to: receive, via a network connection, a data packet from the communication network; determine, from the first memory block, a value of an extended portion of a local counter associated with the network connection in response to receiving the data packet; capture, from the second memory block, a value of a global counter; compare the value of the extended portion of the local counter with the value of the global counter; and in an instance in which the comparison identifies a mismatch: update the value of the extended portion of the local counter based on the value of the global counter; and set a current value of a bit indicating a status of the network connection, wherein the bit is associated with the plurality of bits.

公开(公告)号：US12244671B1

公开(公告)日：2025-03-04

申请号：US18242637

申请日：2023-09-06

Applicant: Mellanox Technologies, Ltd.

Inventor： Avi Urman ,  Ariel Shahar ,  Najeeb Darawshy

IPC: G06F15/16 ,  H04L67/143

Abstract: Apparatus and method for improved network resource management are described herein. An example computing apparatus comprises a network adapter configured to: receive, via a network connection, a data packet from the communication network; determine, from the first memory block, a value of an extended portion of a local counter associated with the network connection in response to receiving the data packet; capture, from the second memory block, a value of a global counter; compare the value of the extended portion of the local counter with the value of the global counter; and in an instance in which the comparison identifies a mismatch: update the value of the extended portion of the local counter based on the value of the global counter; and set a current value of a bit indicating a status of the network connection, wherein the bit is associated with the plurality of bits.

公开(公告)号：US12231585B2

公开(公告)日：2025-02-18

申请号：US17745906

申请日：2022-05-17

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Yuval Itkin ,  Michael Tahar ,  Haim Kupershmidt ,  Ameer Mahagneh

IPC: H04L9/32

Abstract: In one embodiment, a secure challenge-response method includes requesting respective token challenges from devices, receiving the respective token challenges from the devices, providing the respective token challenges to a signing server, receiving from the signing server a signature of the respective token challenges signed with a private key of the signing server, and providing to a given device of the devices a request to perform an operation, the request including the signature and the respective token challenges.

公开(公告)号：US12229439B1

公开(公告)日：2025-02-18

申请号：US18229509

申请日：2023-08-02

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Niv Aibester ,  Eyal Srebro ,  Liron Mula ,  Amit Kazimirsky

IPC: G06F3/06 ,  G06F1/3234 ,  H04L49/90

Abstract: A network device, a network interface controller, and a switch are provided. In one example, a shared buffer includes a plurality of cells of memory, one or more ports read data from the shared buffer and write data to the shared buffer, and a controller circuit selectively enables and disables cells of memory of the shared buffer based on an amount of data stored in the shared buffer. Power consumption of the shared buffer is in proportion to a number of enabled cells of memory.