摘要:
A power output apparatus 20 includes an engine 50, a clutch motor 30 having rotors 31 and 33 respectively linked with a crankshaft 56 and a drive shaft 22, an assist motor 40 attached to a rotor-rotating shaft 38, a first clutch 45 for connecting and disconnecting the rotor-rotating shaft 38 to and from the crankshaft 56, a second clutch 46 for connecting and disconnecting the rotor-rotating shaft 38 to and from the drive shaft 22, and a controller 80 for controlling the motors 30 and 40. The controller 80 operates the clutches 45 and 46 according to the states of the engine 50 and the drive shaft 22 and changes the connection of the rotor-rotating shaft 38, so as to enable power output from the engine 50 to be efficiently converted by the motors 30 and 40 and output to the drive shaft 22.
摘要:
A fail check device and method for switching signal lines, wherein PWM signals are sent out onto PWM signal lines through a PWM signal output/survey circuit. Based on the level of the PWM signals to be sent out and the level of the PWM signals actually sent out, a PWM mismatch signal (logical) is produced. The produced PWM mismatch signal (logical) has a value which indicates a fault when the PWM signal lines are in a state of breakage or short circuit to a ground or the PWM signal lines in a predrive circuit are short-circuited to the positive wiring of a power source. Therefore, by using the PWM mismatch signal (logical), a breakage in the PWM signal lines or a fault in the predrive circuit can be detected by a control CPU.
摘要:
A diagnostic system and method for detecting retardation of a object controlled by a programmable controller. The system may include a microprocessor system with a keyboard, a printer, a memory card, and a telecommunications line which is connected to one or more programmable controllers. This system reads operational commands and signals, representing the completion of an operation, through the telecommunications line. If any retardation occurs, the diagnostic system fetches a series of operation commands, and identifies the logical address where retardation occurs.