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公开(公告)号:US20190181019A1
公开(公告)日:2019-06-13
申请号:US16276866
申请日:2019-02-15
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Roman GOUK , Guan Huei SEE , Yu GU , Arvind SUNDARRAJAN , Kyuil CHO , Colin Costano NEIKIRK , Boyi FU
IPC: H01L21/56 , H01L23/31 , H01L23/538 , H01L23/13 , H01L23/00 , H01L21/48 , H01L21/311 , H01L21/027 , H01L21/02 , G03F7/00
Abstract: Embodiments of the present disclosure generally describe methods for minimizing the occurrence and the extent of die shift during the formation of a reconstituted substrate in fan-out wafer level packaging processes and reconstituted substrates formed therefrom. Die shift is a process defect that occurs when a die (device) moves from its intended position within a reconstituted substrate during the formation thereof. Generally, the reconstituted substrates disclosed herein include a device immobilization layer and/or a plurality of device immobilization beads over and/or adjacent to a plurality of singular devices (individual dies), and a cured epoxy molding compound formed there over. The device immobilization layer and/or the plurality of device immobilization beads immobilize the plurality of singular devices and prevents them from shifting on the carrier substrate during the molding process.
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公开(公告)号:US20230187370A1
公开(公告)日:2023-06-15
申请号:US18075141
申请日:2022-12-05
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Giback PARK , Giorgio CELLERE , Diego TONINI , Vincent DICAPRIO , Kyuil CHO
IPC: H01L23/538 , H01L21/48 , H01L23/13 , H01L23/14 , H01L23/498 , H01L25/10 , H01L23/66 , H01Q1/22 , H01Q1/24 , H05K1/02 , H01L21/50 , H01L21/768 , H01L25/065 , H01L27/06
CPC classification number: H01L23/5389 , H01L21/486 , H01L21/4864 , H01L23/13 , H01L23/147 , H01L23/49827 , H01L23/49838 , H01L23/49866 , H01L23/49894 , H01L23/5384 , H01L23/5386 , H01L25/105 , H01L23/66 , H01Q1/2283 , H01Q1/243 , H05K1/0243 , H01L21/50 , H01L21/76802 , H01L23/5385 , H01L25/0657 , H01L27/0688 , H01L2225/1035 , H01L2225/107 , H01L2021/60007
Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
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公开(公告)号:US20210288027A1
公开(公告)日:2021-09-16
申请号:US16814785
申请日:2020-03-10
Applicant: Applied Materials, Inc.
Inventor: Kurtis LESCHKIES , Han-Wen CHEN , Steven VERHAVERBEKE , Giback PARK , Kyuil CHO , Jeffrey L. FRANKLIN , Wei-Sheng LEI
IPC: H01L25/065 , H05K1/14 , H01L25/00 , H01L23/495 , H01L23/522
Abstract: The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.
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公开(公告)号:US20180374718A1
公开(公告)日:2018-12-27
申请号:US15840900
申请日:2017-12-13
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Roman GOUK , Guan Huei SEE , Yu GU , Arvind SUNDARRAJAN , Kyuil CHO , Colin Costano NEIKIRK , Boyi FU
Abstract: Embodiments of the present disclosure generally describe methods for minimizing the occurrence and the extent of die shift during the formation of a reconstituted substrate in fan-out wafer level packaging processes. Die shift is a process defect that occurs when a die (device) moves from its intended position within a reconstituted substrate during the formation thereof. Generally, the methods disclosed herein include depositing a device immobilization layer and/or a plurality of device immobilization beads over and/or adjacent to a plurality of singular devices (individual dies), and the carrier substrate they are positioned on, before forming a reconstituted substrate with an epoxy molding compound. The device immobilization layer and/or the plurality of device immobilization beads immobilize the plurality of singular devices and prevents them from shifting on the carrier substrate during the molding process.
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公开(公告)号:US20240222142A1
公开(公告)日:2024-07-04
申请号:US18089632
申请日:2022-12-28
Applicant: Applied Materials, Inc.
Inventor: Tapash CHAKRABORTY , Steven VERHAVERBEKE , Han-Wen CHEN , Kyuil CHO , Kent ZHAO , Gopi Chandran RAMACHANDRAN
IPC: H01L21/48 , H01L23/538 , H10B80/00
CPC classification number: H01L21/486 , H01L23/5384 , H01L23/5389 , H10B80/00
Abstract: Semiconductor packages and methods for metallization of non-conducting surfaces for fabricating semiconductor packages are provided. In an embodiment, the method includes depositing an adhesion layer on a polymeric surface by an electroless deposition process. The polymeric surface defines a sidewall of a through-hole via and the adhesion layer comprises a cobalt alloy or a nickel alloy. The method further includes depositing a copper seed layer on the adhesion layer by an immersion plating process. The copper seed layer displaces a portion of the adhesion layer. The method further includes filling the through-hole via with a copper containing layer.
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6.
公开(公告)号:US20240021533A1
公开(公告)日:2024-01-18
申请号:US18362433
申请日:2023-07-31
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Guan Huei SEE , Giback PARK , Giorgio CELLERE , Diego TONINI , Vincent DICAPRIO , Kyuil CHO
IPC: H01L23/538 , H01L21/48 , H01L23/13 , H01L23/14 , H01L23/498 , H01L25/10 , H01L23/66 , H01Q1/22 , H01Q1/24 , H05K1/02 , H01L21/50 , H01L21/768 , H01L25/065 , H01L27/06
CPC classification number: H01L23/5389 , H01L21/486 , H01L21/4864 , H01L23/13 , H01L23/147 , H01L23/49827 , H01L23/49838 , H01L23/49866 , H01L23/49894 , H01L23/5384 , H01L23/5386 , H01L25/105 , H01L23/66 , H01Q1/2283 , H01Q1/243 , H05K1/0243 , H01L21/50 , H01L21/76802 , H01L23/5385 , H01L25/0657 , H01L27/0688 , H01L2225/1035 , H01L2225/107 , H01L2021/60007
Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
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7.
公开(公告)号:US20210257307A1
公开(公告)日:2021-08-19
申请号:US17227983
申请日:2021-04-12
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Guan Huei SEE , Giback PARK , Giorgio CELLERE , Diego TONINI , Vincent DICAPRIO , Kyuil CHO
IPC: H01L23/538 , H01L21/48 , H01L23/13 , H01L23/14 , H01L23/498 , H01L25/10 , H01L23/66 , H01Q1/22 , H01Q1/24 , H05K1/02 , H01L21/50 , H01L21/768 , H01L25/065 , H01L27/06
Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
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公开(公告)号:US20210257306A1
公开(公告)日:2021-08-19
申请号:US17227811
申请日:2021-04-12
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Giback PARK , Giorgio CELLERE , Diego TONINI , Vincent DICAPRIO , Kyuil CHO
IPC: H01L23/538 , H01L21/48 , H01L23/13 , H01L23/14 , H01L23/498 , H01L25/10 , H01L23/66 , H01Q1/22 , H01Q1/24 , H05K1/02 , H01L21/50 , H01L21/768 , H01L25/065 , H01L27/06
Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
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公开(公告)号:US20210257289A1
公开(公告)日:2021-08-19
申请号:US17227837
申请日:2021-04-12
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Giback PARK , Kyuil CHO , Kurtis LESCHKIES , Roman GOUK , Chintan BUCH , Vincent DICAPRIO , Bernhard STONAS , Jean DELMAS
IPC: H01L23/498 , H01L23/14 , H01L21/48
Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.
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公开(公告)号:US20210249345A1
公开(公告)日:2021-08-12
申请号:US17227867
申请日:2021-04-12
Applicant: Applied Materials, Inc.
Inventor: Han-Wen CHEN , Steven VERHAVERBEKE , Giback PARK , Kyuil CHO , Kurtis LESCHKIES , Roman GOUK , Chintan BUCH , Vincent DICAPRIO , Bernhard STONAS , Jean DELMAS
IPC: H01L23/498 , H01L21/48 , H01L23/14
Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.
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