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    ELECTRICALLY CONDUCTIVE TAPE FOR WALLS AND CEILINGS
    3.
    发明申请
    ELECTRICALLY CONDUCTIVE TAPE FOR WALLS AND CEILINGS 审中-公开
    用于墙面和天花板的电导电胶带

    公开(公告)号：US20100170616A1

    公开(公告)日：2010-07-08

    申请号：US12552499

    申请日：2009-09-02

    申请人： Daniel Boss ,  David McDonald ,  Terrance Z. Kaiserman ,  Keith J. Margolin ,  Michael Wassief ,  Liang Chai

    发明人： Daniel Boss ,  David McDonald ,  Terrance Z. Kaiserman ,  Keith J. Margolin ,  Michael Wassief ,  Liang Chai

    IPC分类号： H01B1/02 ,  B32B3/10 ,  E04F13/00

    CPC分类号： H01B7/0815 ,  H01B7/0846 ,  Y10T428/24273 ,  Y10T428/24612

    摘要： An electrically conductive tape for walls and ceilings is provided. The tape includes a substrate configured to be applied to at least one surface including at least one surface of a wall or ceiling and at least one conductive layer applied to the substrate. The conductive layer is penetrable by at least a conductor of an electrical device to provide an electrical connection thereto. In one embodiment the conductive layer is formed from a conductive composition including an electrically conductive material therein. The conductive composition can include a conductive ink. A method of manufacturing an electrically conductive tape or film for walls and ceilings is also provided. The method includes providing a conductive composition including an electrically conductive material therein, and providing a substrate configured to be applied to at least one surface including at least one surface of a wall or ceiling. The method also includes applying the conductive composition to the substrate forming a conductive layer attached to the substrate, the conductive layer being penetrable by a conductor of an electrical device.

    摘要翻译： 提供了一种用于墙壁和天花板的导电胶带。 胶带包括被配置为施加到包括壁或天花板的至少一个表面的至少一个表面的衬底和施加到衬底的至少一个导电层。 导电层可以由电气装置的至少一个导体穿透以提供与其电连接。 在一个实施例中，导电层由其中包含导电材料的导电组合物形成。 导电组合物可以包括导电油墨。 还提供了制造用于墙壁和天花板的导电带或膜的方法。 该方法包括在其中提供包括导电材料的导电组合物，并提供构造成施加到包括壁或天花板的至少一个表面的至少一个表面的基底。 该方法还包括将导电组合物施加到形成连接到衬底的导电层的衬底上，导电层可被电子器件的导体穿透。

    Electrically conductive module
    4.
    发明授权
    Electrically conductive module 有权
    导电模块

    公开(公告)号：US08441156B2

    公开(公告)日：2013-05-14

    申请号：US12552502

    申请日：2009-09-02

    申请人： Daniel Boss ,  Scott Qualls ,  Terrance Z. Kaiserman ,  Keith J. Margolin ,  Michael Wassief ,  Liang Chai

    发明人： Daniel Boss ,  Scott Qualls ,  Terrance Z. Kaiserman ,  Keith J. Margolin ,  Michael Wassief ,  Liang Chai

    IPC分类号： H01H35/24

    CPC分类号： H01R9/28 ,  E04B9/04 ,  H01R25/16

    摘要： An electrically conductive module is provided. The module includes a panel configured to engage with one or more conductive structural elements. The module further includes conductive layers formed on or in the panel. Each conductive layer has a terminal configured to be in electrical communication with at least one of the conductive structural elements. In one embodiment of the present invention, a first terminal is configured to be in electrical communication with a first conductive structural element and a second terminal is configured to be in electrical communication with a second conductive structural element. In another embodiment of the present invention, both a first terminal and a second terminal are configured to be in electrical communication with a first conductive structural element. In this embodiment, the first and second terminals are respectively configured to be in electrical communication with first and second conductive portions of the first conductive structural element.

    摘要翻译： 提供导电模块。 模块包括被配置为与一个或多个导电结构元件接合的面板。 模块还包括形成在面板上或面板中的导电层。 每个导电层具有构造成与至少一个导电结构元件电连通的端子。 在本发明的一个实施例中，第一端子被配置为与第一导电结构元件电连通，并且第二端子被配置为与第二导电结构元件电连通。 在本发明的另一个实施例中，第一端子和第二端子被配置为与第一导电结构元件电连通。 在本实施例中，第一和第二端子分别构造成与第一导电结构元件的第一和第二导电部分电连通。

    ELECTRICALLY CONDUCTIVE MODULE
    5.
    发明申请
    ELECTRICALLY CONDUCTIVE MODULE 有权
    电导体模块

    公开(公告)号：US20100170702A1

    公开(公告)日：2010-07-08

    申请号：US12552502

    申请日：2009-09-02

    申请人： Daniel Boss ,  Scott Qualls ,  Terrance Z. Kaiserman ,  Keith J. Margolin ,  Michael Wassief ,  Liang Chai

    发明人： Daniel Boss ,  Scott Qualls ,  Terrance Z. Kaiserman ,  Keith J. Margolin ,  Michael Wassief ,  Liang Chai

    IPC分类号： H05K1/02 ,  H05K1/09 ,  B05D5/12

    CPC分类号： H01R9/28 ,  E04B9/04 ,  H01R25/16

    摘要： An electrically conductive module is provided. The module includes a panel configured to engage with one or more conductive structural elements. The module further includes conductive layers formed on or in the panel. Each conductive layer has a terminal configured to be in electrical communication with at least one of the conductive structural elements. In one embodiment of the present invention, a first terminal is configured to be in electrical communication with a first conductive structural element and a second terminal is configured to be in electrical communication with a second conductive structural element. In another embodiment of the present invention, both a first terminal and a second terminal are configured to be in electrical communication with a first conductive structural element. In this embodiment, the first and second terminals are respectively configured to be in electrical communication with first and second conductive portions of the first conductive structural element.

    摘要翻译： 提供导电模块。 模块包括被配置为与一个或多个导电结构元件接合的面板。 模块还包括形成在面板上或面板中的导电层。 每个导电层具有构造成与至少一个导电结构元件电连通的端子。 在本发明的一个实施例中，第一端子被配置为与第一导电结构元件电连通，并且第二端子被配置为与第二导电结构元件电连通。 在本发明的另一个实施例中，第一端子和第二端子被配置为与第一导电结构元件电连通。 在本实施例中，第一和第二端子分别构造成与第一导电结构元件的第一和第二导电部分电连通。

    Capacitor with Three-Dimensional High Surface Area Electrode and Methods of Manufacture
    6.
    发明申请
    Capacitor with Three-Dimensional High Surface Area Electrode and Methods of Manufacture 有权
    具有三维高表面积电极的电容器及其制造方法

    公开(公告)号：US20110310528A1

    公开(公告)日：2011-12-22

    申请号：US12969186

    申请日：2010-12-15

    申请人： Liang Chai ,  Alan Rae ,  Jim Wilson

    发明人： Liang Chai ,  Alan Rae ,  Jim Wilson

    IPC分类号： H01G4/06 ,  H01G7/00

    CPC分类号： H01G4/10 ,  H01G4/005 ,  H01G4/008 ,  H01G4/12 ,  H01G4/1209 ,  H01G4/30 ,  Y10T29/43 ,  Y10T29/435

    摘要： A capacitor, and methods of its manufacture, having improved capacitance efficiency which results from increasing the effective area of an electrode surface are disclosed. An improved “three-dimensional” capacitor may be constructed with electrode layers having three-dimensional aspects at the point of interface with a dielectric such that portions of the electrode extend into the dielectric layer. Advantageously, embodiments of a three-dimensional capacitor drastically reduce the space footprint that is required in a circuit to accommodate the capacitor, when compared to current capacitor designs. Increased capacitance density may be realized without using high k (high constant) dielectric materials, additional “electrode-dielectric-electrode” arrangements in an ever increasing stack, or serially stringing together multiple capacitors.

    摘要翻译： 公开了一种电容器及其制造方法，其具有由于增加电极表面的有效面积而提高的电容效率。 可以在与电介质的界面点处具有三维方面的电极层来构造改进的“三维”电容器，使得电极的一部分延伸到电介质层中。 有利的是，与当前的电容器设计相比，三维电容器的实施例大大减少了电路中所需的容纳电容器的空间足迹。 可以在不使用高k（高常数）电介质材料的情况下实现增加的电容密度，而在不断增加的叠层中使用附加的“电极 - 电介质电极”布置，或者串联连接多个电容器。

    CERAMIC CAPACITOR AND METHODS OF MANUFACTURE
    7.
    发明申请
    CERAMIC CAPACITOR AND METHODS OF MANUFACTURE 审中-公开
    陶瓷电容器及其制造方法

    公开(公告)号：US20120262836A1

    公开(公告)日：2012-10-18

    申请号：US13270645

    申请日：2011-10-11

    申请人： Liang Chai

    发明人： Liang Chai

    IPC分类号： H01G4/12 ,  H01G4/30 ,  H01G13/00 ,  H01G4/08

    CPC分类号： H01G4/1227 ,  H01G4/005 ,  H01G4/012 ,  H01G4/12 ,  H01G4/1245 ,  H01G4/1263 ,  H01G4/248 ,  H01G4/30 ,  H01G4/33

    摘要： A capacitor includes a pair of electrodes and a metalized dielectric layer disposed between the pair of electrodes, in which the metalized dielectric layer has a plurality of metal aggregates distributed within a dielectric material. The distribution is such that a volume fraction of metal in the metalized dielectric layer is at least about 30%. Meanwhile, the plurality of metal aggregates are separated from one another by the dielectric material. A method for forming a metal-dielectric composite may include coating a plurality of dielectric particles with a metal to form a plurality of metal-coated dielectric particles and sintering the plurality of metal-coated dielectric particles at a temperature of at least about 750° C. to about 950° C. to transform the metal coatings into discrete, separated metal aggregates. Contrary to conventional techniques of separating electrodes by a dielectric tape, this inventive system and method demonstrates that a metalized dielectric layer may be formed in-situ during sintering.

    摘要翻译： 电容器包括一对电极和设置在该对电极之间的金属化介电层，其中金属化介电层具有分布在电介质材料内的多个金属聚集体。 该分布使得金属化介电层中的金属的体积分数至少为约30％。 同时，多个金属聚集体通过介电材料彼此分离。 形成金属 - 电介质复合材料的方法可以包括用金属涂覆多个电介质颗粒以形成多个金属涂覆的电介质颗粒，并在至少约750℃的温度下烧结多个金属涂覆的电介质颗粒 到约950℃，以将金属涂层转变成离散的分离的金属聚集体。 与通过电介质带分离电极的常规技术相反，本发明的系统和方法证明了可以在烧结期间原位形成金属化电介质层。

    Ceramic capacitor and methods of manufacture
    9.
    发明授权
    Ceramic capacitor and methods of manufacture 有权
    陶瓷电容器及其制造方法

    公开(公告)号：US08885322B2

    公开(公告)日：2014-11-11

    申请号：US13270645

    申请日：2011-10-11

    申请人： Liang Chai

    发明人： Liang Chai

    IPC分类号： H01G4/06 ,  H01G4/005 ,  H01G4/12 ,  H01G4/30 ,  H01G4/33

    CPC分类号： H01G4/1227 ,  H01G4/005 ,  H01G4/012 ,  H01G4/12 ,  H01G4/1245 ,  H01G4/1263 ,  H01G4/248 ,  H01G4/30 ,  H01G4/33

    摘要： A capacitor includes a pair of electrodes and a metalized dielectric layer disposed between the pair of electrodes, in which the metalized dielectric layer has a plurality of metal aggregates distributed within a dielectric material. The distribution is such that a volume fraction of metal in the metalized dielectric layer is at least about 30%. Meanwhile, the plurality of metal aggregates are separated from one another by the dielectric material. A method for forming a metal-dielectric composite may include coating a plurality of dielectric particles with a metal to form a plurality of metal-coated dielectric particles and sintering the plurality of metal-coated dielectric particles at a temperature of at least about 750° C. to about 950° C. to transform the metal coatings into discrete, separated metal aggregates. Contrary to conventional techniques of separating electrodes by a dielectric tape, this inventive system and method demonstrates that a metalized dielectric layer may be formed in-situ during sintering.

    摘要翻译： 电容器包括一对电极和设置在该对电极之间的金属化介电层，其中金属化介电层具有分布在电介质材料内的多个金属聚集体。 该分布使得金属化介电层中的金属的体积分数至少为约30％。 同时，多个金属聚集体通过介电材料彼此分离。 形成金属 - 电介质复合材料的方法可以包括用金属涂覆多个电介质颗粒以形成多个金属涂覆的电介质颗粒，并在至少约750℃的温度下烧结多个金属涂覆的电介质颗粒 到约950℃，以将金属涂层转变成离散的分离的金属聚集体。 与通过电介质带分离电极的常规技术相反，本发明的系统和方法证明了可以在烧结期间原位形成金属化电介质层。

    Methods for manufacture a capacitor with three-dimensional high surface area electrodes
    10.
    发明授权
    Methods for manufacture a capacitor with three-dimensional high surface area electrodes 有权
    制造具有三维高表面积电极的电容器的方法

    公开(公告)号：US08561271B2

    公开(公告)日：2013-10-22

    申请号：US12969186

    申请日：2010-12-15

    申请人： Liang Chai ,  Alan Rae ,  James M Wison

    发明人： Liang Chai ,  Alan Rae ,  James M Wison

    IPC分类号： H01G4/10

    CPC分类号： H01G4/10 ,  H01G4/005 ,  H01G4/008 ,  H01G4/12 ,  H01G4/1209 ,  H01G4/30 ,  Y10T29/43 ,  Y10T29/435

    摘要： A method for making a capacitor having improved capacitance efficiency which results from increasing the effective area of an electrode surface is disclosed. Specifically, an improved “three-dimensional” capacitor may be constructed with electrode layers having three-dimensional aspects at the point of interface with a dielectric such that portions of the electrode extend into the dielectric layer. Advantageously, embodiments of a three-dimensional capacitor drastically reduce the space footprint that is required in a circuit to accommodate the capacitor, when compared to current capacitor designs. Increased capacitance density may be realized without using high k (high constant) dielectric materials, additional “electrode-dielectric-electrode” arrangements in an ever increasing stack, or serially stringing together multiple capacitors.

    摘要翻译： 公开了一种通过增加电极表面的有效面积制造具有提高的电容效率的电容器的方法。 具体地说，改进的“三维”电容器可以由与电介质接合点的三维方面的电极层构成，使得电极的一部分延伸到电介质层中。 有利的是，与当前的电容器设计相比，三维电容器的实施例大大减少了电路中所需的容纳电容器的空间足迹。 可以在不使用高k（高常数）电介质材料的情况下实现增加的电容密度，而在不断增加的叠层中使用附加的“电极 - 电介质电极”布置，或者串联连接多个电容器。