公开(公告)号：US20170077266A1

公开(公告)日：2017-03-16

申请号：US15361994

申请日：2016-11-28

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/267 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

Abstract translation: 制造半导体器件的方法包括在衬底中形成翅片; 沉积第一间隔物材料以在翅片周围形成第一间隔物; 沉积第二间隔物材料以在所述第一间隔物上形成第二间隔物; 使第一间隔物和第二间隔物凹陷; 去除第一间隔物; 以及执行外延生长工艺，以沿翅片的侧壁，并且与翅片相邻地在翅片的端部上形成外延生长。

公开(公告)号：US20170047411A1

公开(公告)日：2017-02-16

申请号：US14824349

申请日：2015-08-12

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L21/285 ,  H01L21/324 ,  H01L29/45 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/02

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US10381442B2

公开(公告)日：2019-08-13

申请号：US15954300

申请日：2018-04-16

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Oleg Gluschenkov ,  Zuoguang Liu ,  Shogo Mochizuki ,  Hiroaki Niimi ,  Chun-chen Yeh

IPC: H01L29/08 ,  H01L29/161 ,  H01L29/167 ,  H01L29/417 ,  H01L21/324 ,  H01L21/02 ,  H01L21/265 ,  H01L29/45 ,  H01L29/66 ,  H01L29/165 ,  H01L29/78 ,  H01L21/285 ,  H01L21/8238

Abstract: Techniques for forming Ga-doped source drain contacts in Ge-based transistors are provided. In one aspect, a method for forming Ga-doped source and drain contacts includes the steps of: depositing a dielectric over a transistor; depositing a dielectric over the transistor; forming contact trenches in the dielectric over, and extending down to, source and drain regions of the transistor; depositing an epitaxial material into the contact trenches; implanting gallium ions into the epitaxial material to form an amorphous gallium-doped layer; and annealing the amorphous gallium-doped layer under conditions sufficient to form a crystalline gallium-doped layer having a homogenous gallium concentration of greater than about 5×1020 at./cm3. Transistor devices are also provided utilizing the present Ga-doped source and drain contacts.

公开(公告)号：US20180240875A1

公开(公告)日：2018-08-23

申请号：US15954300

申请日：2018-04-16

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Oleg Gluschenkov ,  Zuoguang Liu ,  Shogo Mochizuki ,  Hiroaki Niimi ,  Chun-chen Yeh

IPC: H01L29/08 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/265 ,  H01L21/285 ,  H01L21/324 ,  H01L21/8238 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L29/0847 ,  H01L21/02057 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/26513 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/41725 ,  H01L29/45 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: Techniques for forming Ga-doped source drain contacts in Ge-based transistors are provided. In one aspect, a method for forming Ga-doped source and drain contacts includes the steps of: depositing a dielectric over a transistor; depositing a dielectric over the transistor; forming contact trenches in the dielectric over, and extending down to, source and drain regions of the transistor; depositing an epitaxial material into the contact trenches; implanting gallium ions into the epitaxial material to form an amorphous gallium-doped layer; and annealing the amorphous gallium-doped layer under conditions sufficient to form a crystalline gallium-doped layer having a homogenous gallium concentration of greater than about 5×1020 at./cm3. Transistor devices are also provided utilizing the present Ga-doped source and drain contacts.

公开(公告)号：US09972682B2

公开(公告)日：2018-05-15

申请号：US15004756

申请日：2016-01-22

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Oleg Gluschenkov ,  Zuoguang Liu ,  Shogo Mochizuki ,  Hiroaki Niimi ,  Chun-chen Yeh

IPC: H01L29/08 ,  H01L29/161 ,  H01L29/167 ,  H01L29/417 ,  H01L21/324 ,  H01L21/02 ,  H01L21/265 ,  H01L29/45 ,  H01L29/66 ,  H01L29/165 ,  H01L29/78 ,  H01L21/285 ,  H01L21/8238

CPC classification number: H01L29/0847 ,  H01L21/02057 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/26513 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/41725 ,  H01L29/45 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: Techniques for forming Ga-doped source drain contacts in Ge-based transistors are provided. In one aspect, a method for forming Ga-doped source and drain contacts includes the steps of: depositing a dielectric over a transistor; depositing a dielectric over the transistor; forming contact trenches in the dielectric over, and extending down to, source and drain regions of the transistor; depositing an epitaxial material into the contact trenches; implanting gallium ions into the epitaxial material to form an amorphous gallium-doped layer; and annealing the amorphous gallium-doped layer under conditions sufficient to form a crystalline gallium-doped layer having a homogenous gallium concentration of greater than about 5×1020 at./cm3. Transistor devices are also provided utilizing the present Ga-doped source and drain contacts.

公开(公告)号：US10229987B2

公开(公告)日：2019-03-12

申请号：US15815857

申请日：2017-11-17

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/02 ,  H01L21/285 ,  H01L21/324 ,  H01L29/45 ,  H01L27/088 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US20180076299A1

公开(公告)日：2018-03-15

申请号：US15815857

申请日：2017-11-17

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L29/45 ,  H01L29/417 ,  H01L29/267 ,  H01L29/24 ,  H01L29/165 ,  H01L29/161 ,  H01L29/08 ,  H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/324 ,  H01L21/285

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US09882024B2

公开(公告)日：2018-01-30

申请号：US15361994

申请日：2016-11-28

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/417 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L21/285 ,  H01L21/324 ,  H01L29/45 ,  H01L27/088 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US20170250285A1

公开(公告)日：2017-08-31

申请号：US15592597

申请日：2017-05-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Veeraraghavan S. Basker ,  Chung-Hsun Lin ,  Zuoguang Liu ,  Tenko Yamashita ,  Chun-Chen Yeh

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L29/417 ,  H01L21/311 ,  H01L21/8234

CPC classification number: H01L29/7851 ,  H01L21/3065 ,  H01L21/31111 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823475 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848

Abstract: This disclosure relates to a fin field effect transistor including a gate structure formed on a fin. Source and drain (S/D) regions are epitaxially grown on the fin adjacent to the gate structure. The S/D regions include a diamond-shaped cross section wherein the diamond-shaped cross section includes: internal sidewalls where the fin was recessed to a reduced height, and an external top portion of the diamond-shaped cross section of the S/D regions. A contact liner is formed over the internal sidewalls and the top portion of the diamond-shaped cross section of the S/D regions; and contacts are formed over the contact liner and over the internal sidewalls and the top portion of the diamond-shaped cross section of the S/D regions.

公开(公告)号：US10249502B2

公开(公告)日：2019-04-02

申请号：US15004751

申请日：2016-01-22

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Oleg Gluschenkov ,  Zuoguang Liu ,  Shogo Mochizuki ,  Hiroaki Niimi ,  Tenko Yamashita ,  Chun-chen Yeh

IPC: H01L21/336 ,  H01L21/285 ,  H01L29/08 ,  H01L29/24 ,  H01L29/267 ,  H01L29/78 ,  H01L29/66 ,  H01L21/768

Abstract: Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×1021 atoms per cubic centimeter (at./cm3). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.