公开(公告)号：US20160035863A1

公开(公告)日：2016-02-04

申请号：US14883049

申请日：2015-10-14

Applicant: GLOBALFOUNDRIES Inc. ,  International Business Machines Corporation

Inventor： Xiuyu Cai ,  Ruilong Xie ,  Ajey P. Jacob ,  Witold P. Maszara ,  Kangguo Cheng ,  Ali Khakifirooz

IPC: H01L29/66 ,  H01L29/165 ,  H01L21/02 ,  H01L29/78 ,  H01L21/762

CPC classification number: H01L29/66795 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/76224 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/6681 ,  H01L29/7849 ,  H01L29/785

Abstract: An illustrative method includes forming a FinFET device above structure comprising a semiconductor substrate, a first epi semiconductor material and a second epi semiconductor material that includes forming an initial fin structure that comprises portions of the semiconductor substrate, the first epi material and the second epi material, recessing a layer of insulating material such that a portion, but not all, of the second epi material portion of the initial fin structure is exposed so as to define a final fin structure, forming a gate structure above and around the final fin structure, removing the first epi material of the initial fin structure and thereby define an under-fin cavity under the final fin structure and substantially filling the under-fin cavity with a stressed material.

Abstract translation: 一种说明性的方法包括在包括半导体衬底，第一外延半导体材料和第二外延半导体材料的结构之上形成FinFET器件，其包括形成包括半导体衬底，第一外延材料和第二外延材料的部分的初始鳍结构 使一层绝缘材料凹陷，使得初始翅片结构的第二外延材料部分的一部分（但不是全部）暴露以便限定最终的翅片结构，在最后的翅片结构的上方和周围形成栅极结构， 去除初始翅片结构的第一外延材料，从而在最终翅片结构下限定底鳍腔，并用应力材料基本上填充底鳍腔。

公开(公告)号：US20160013296A1

公开(公告)日：2016-01-14

申请号：US14860276

申请日：2015-09-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jody Fronheiser ,  Ajey P. Jacob ,  Witold P. Maszara ,  Kerem Akarvardar

IPC: H01L29/66 ,  H01L29/165 ,  H01L29/267 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L29/165 ,  H01L29/267 ,  H01L29/785 ,  H01L29/7851

Abstract: One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure.

Abstract translation: 本文公开的一个示例性器件包括形成在由第一半导体材料构成的衬底中的衬底鳍片，其中衬底鳍片的至少一个侧壁基本上位于衬底的晶体结构的<100>晶体方向上，替换鳍片 位于所述衬底翅片上方的结构，其中所述替换翅片结构由与所述第一半导体材料不同的半导体材料和位于所述替换翅片结构的至少一部分周围的栅极结构构成。

公开(公告)号：US20140264488A1

公开(公告)日：2014-09-18

申请号：US13839998

申请日：2013-03-15

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jody Fronheiser ,  Ajey P. Jacob ,  Witold P. Maszara ,  Kerem Akarvardar

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L29/165 ,  H01L29/267 ,  H01L29/785 ,  H01L29/7851

Abstract: One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure.

Abstract translation: 本文公开的一个示例性器件包括形成在由第一半导体材料构成的衬底中的衬底鳍片，其中衬底鳍片的至少一个侧壁基本上位于衬底的晶体结构的<100>晶体方向上，替换鳍片 位于所述衬底翅片上方的结构，其中所述替换翅片结构由与所述第一半导体材料不同的半导体材料和位于所述替换翅片结构的至少一部分周围的栅极结构构成。

公开(公告)号：US09614058B2

公开(公告)日：2017-04-04

申请号：US14860276

申请日：2015-09-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jody Fronheiser ,  Ajey P. Jacob ,  Witold P. Maszara ,  Kerem Akarvardar

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/267

CPC classification number: H01L29/66795 ,  H01L29/165 ,  H01L29/267 ,  H01L29/785 ,  H01L29/7851

Abstract: One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure.

公开(公告)号：US20160204261A1

公开(公告)日：2016-07-14

申请号：US15073936

申请日：2016-03-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ajey Poovannummoottil Jacob ,  Witold P. Maszara ,  Jody A. Fronheiser

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/51 ,  H01L29/66 ,  H01L21/306

CPC classification number: H01L29/7851 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/30604 ,  H01L21/32133 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/201 ,  H01L29/51 ,  H01L29/66522 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785

Abstract: One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming a sacrificial gate structure around a portion of an initial fin, forming a sidewall spacer adjacent opposite sides of the sacrificial gate structure and removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove portions of the initial fin so as to thereby define a reduced size fin and recesses under the sidewall spacers, forming at least one replacement epi semiconductor cladding material around the reduced size fin in the replacement gate cavity and in the recesses under the sidewall spacers, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.

Abstract translation: 公开了在半导体器件的沟道区域中形成外延半导体包层材料的一种方法，其包括围绕初始鳍片的一部分形成牺牲栅极结构，在牺牲栅极结构的相对侧上形成侧壁间隔物，并去除牺牲栅极 结构，从而限定替换栅极腔，通过替代栅极腔执行蚀刻工艺以去除初始翅片的部分，从而限定在侧壁间隔物下方的减小尺寸的翅片和凹陷，形成至少一个替代外延半导体 在更换的浇口腔体和侧壁间隙的凹槽内围绕减小尺寸的翅片的覆层材料，以及在至少一个替代的外延半导体包层材料周围的置换栅极腔内形成替换栅极结构。

公开(公告)号：US09240342B2

公开(公告)日：2016-01-19

申请号：US13944200

申请日：2013-07-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ajey P. Jacob ,  Murat K. Akarvardar ,  Jody Fronheiser ,  Witold P. Maszara

IPC: H01L21/762 ,  H01L29/66 ,  H01L29/78 ,  H01L27/12

CPC classification number: H01L21/32055 ,  H01L21/3105 ,  H01L21/76224 ,  H01L27/1203 ,  H01L29/66628 ,  H01L29/66765 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a stable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 104 defects/cm2 or less throughout its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

Abstract translation: 本文公开了用于形成处于稳定或亚稳态的替代翅片材料的各种方法。 在一种情况下，稳定的替换翅片生长到比替换翅片材料的无约束的稳定的临界厚度大的高度，并且其整个高度的缺陷密度为104个缺陷/ cm2或更小。 在另一种情况下，亚稳替代鳍生长到高于替代翅片材料的无约束亚稳临界厚度的高度，并且在其整个高度的至少90％中具有105缺陷/ cm2或更小的缺陷密度。

公开(公告)号：US20150255608A1

公开(公告)日：2015-09-10

申请号：US14200952

申请日：2014-03-07

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Xiuyu Cai ,  Ruilong Xie ,  Ajey P. Jacob ,  Witold P. Maszara ,  Kangguo Cheng ,  Ali Khakifirooz

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L29/66

CPC classification number: H01L29/66795 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/76224 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/6681 ,  H01L29/7849 ,  H01L29/785

Abstract: One method disclosed includes, among other things, forming an initial fin structure comprised of portions of a substrate, a first epi semiconductor material and a second epi semiconductor material, forming a layer of insulating material so as to over-fill the trenches that define the fin, recessing a layer of insulating material such that a portion, but not all, of the second epi semiconductor portion of the final fin structure is exposed, forming a gate structure around the final fin structure, further recessing the layer of insulating material such that the first epi semiconductor material is exposed, removing the first epi semiconductor material to thereby define an under-fin cavity and substantially filling the under-fin cavity with a stressed material.

Abstract translation: 所公开的一种方法包括形成由衬底，第一外延半导体材料和第二外延半导体材料的部分组成的初始鳍结构，形成绝缘材料层，从而过度填充限定 翅片，使一层绝缘材料凹陷，使得最终翅片结构的第二外延半导体部分的一部分（但不是全部）暴露，围绕最终翅片结构形成栅极结构，进一步使绝缘材料层凹陷，使得 第一外延半导体材料被暴露，去除第一外延半导体材料，从而限定下鳍腔，并用受压材料基本上填充底鳍腔。

公开(公告)号：US20160163863A1

公开(公告)日：2016-06-09

申请号：US14560361

申请日：2014-12-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ajey Poovannummoottil Jacob ,  Witold P. Maszara ,  Jody A. Fronheiser

IPC: H01L29/78 ,  H01L29/201 ,  H01L21/02 ,  H01L29/161 ,  H01L29/66 ,  H01L21/3213

CPC classification number: H01L29/7851 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/30604 ,  H01L21/32133 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/201 ,  H01L29/51 ,  H01L29/66522 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785

Abstract: One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming an initial epi semiconductor cladding material around the exposed portion of a fin for an entire axial length of the fin, forming a sacrificial gate structure around a portion of the fin and the initial cladding material, removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove at least the exposed portion of the initial cladding material and thereby expose a surface of the fin within the replacement gate cavity, forming at least one replacement epi semiconductor cladding material around the exposed surface of the fin, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.

Abstract translation: 公开了在半导体器件的沟道区域中形成外延半导体包层材料的一种方法，其包括在翅片的整个轴向长度周围围绕翅片的暴露部分形成初始外延半导体包层材料，在其周围形成牺牲栅极结构 去除所述牺牲栅极结构从而限定替换栅极腔，通过所述替换栅极腔执行蚀刻工艺以移除所述初始包层材料的至少暴露部分，从而暴露出所述牺牲栅极结构 在替换栅极腔内的翅片的表面，在散热片的暴露表面周围形成至少一个替代外延半导体覆层材料，以及在所述替代栅极腔内形成围绕所述至少一个替代外延半导体包层材料的替代栅极结构。

公开(公告)号：US09362405B1

公开(公告)日：2016-06-07

申请号：US14560361

申请日：2014-12-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ajey Poovannummoottil Jacob ,  Witold P. Maszara ,  Jody A. Fronheiser

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/3213 ,  H01L21/02 ,  H01L29/161 ,  H01L29/201

CPC classification number: H01L29/7851 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/30604 ,  H01L21/32133 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/201 ,  H01L29/51 ,  H01L29/66522 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785

Abstract: One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming an initial epi semiconductor cladding material around the exposed portion of a fin for an entire axial length of the fin, forming a sacrificial gate structure around a portion of the fin and the initial cladding material, removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove at least the exposed portion of the initial cladding material and thereby expose a surface of the fin within the replacement gate cavity, forming at least one replacement epi semiconductor cladding material around the exposed surface of the fin, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.

Abstract translation: 公开了在半导体器件的沟道区域中形成外延半导体包层材料的一种方法，其包括在翅片的整个轴向长度周围围绕翅片的暴露部分形成初始外延半导体包层材料，在其周围形成牺牲栅极结构 去除所述牺牲栅极结构从而限定替换栅极腔，通过所述替换栅极腔执行蚀刻工艺以移除所述初始包层材料的至少暴露部分，从而暴露出所述牺牲栅极结构 在替换栅极腔内的翅片的表面，在散热片的暴露表面周围形成至少一个替代外延半导体覆层材料，以及在所述替代栅极腔内形成围绕所述至少一个替代外延半导体包层材料的替代栅极结构。

公开(公告)号：US20160064250A1

公开(公告)日：2016-03-03

申请号：US14931277

申请日：2015-11-03

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ajey P. Jacob ,  Murat K. Akarvardar ,  Jody Fronheiser ,  Witold P. Maszara

IPC: H01L21/3205 ,  H01L21/3105

CPC classification number: H01L21/32055 ,  H01L21/3105 ,  H01L21/76224 ,  H01L27/1203 ,  H01L29/66628 ,  H01L29/66765 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a metastable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

Abstract translation: 本文公开了用于形成处于稳定或亚稳态的替代翅片材料的各种方法。 在一种情况下，亚稳态替代翅片生长到大于置换翅片材料的无约束稳定的临界厚度的高度，并且在其整个高度的至少90％中具有105缺陷/ cm2或更小的缺陷密度。 在另一种情况下，亚稳替代鳍生长到高于替代翅片材料的无约束亚稳临界厚度的高度，并且在其整个高度的至少90％中具有105缺陷/ cm2或更小的缺陷密度。