-
公开(公告)号：US10388731B2
公开(公告)日：2019-08-20
申请号：US15925051
申请日：2018-03-19
发明人： Kangguo Cheng , Xin Miao , Ruilong Xie , Tenko Yamashita
IPC分类号： B82Y10/00 , H01L21/02 , H01L21/84 , H01L27/12 , H01L29/06 , H01L29/66 , H01L21/265 , H01L27/092 , H01L29/423 , H01L29/775 , H01L29/786 , H01L21/8238
摘要： A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.
-
公开(公告)号：US10374064B2
公开(公告)日：2019-08-06
申请号：US15901447
申请日：2018-02-21
发明人： Kangguo Cheng , Ruilong Xie , Tenko Yamashita
IPC分类号： H01L21/225 , H01L29/66 , H01L29/78 , H01L21/8238 , H01L27/092 , H01L29/10 , H01L29/165
摘要： A method of forming semiconductor devices that includes forming an oxide that is doped with a punch through dopant on a surface of a first semiconductor material having a first lattice dimension, and diffusing punch through dopant from the oxide into the semiconductor material to provide a punch through stop region. The oxide may then be removed. A second semiconductor material may be formed having a second lattice dimension on the first semiconductor material having the first lattice dimension. A difference between the first lattice dimension and the second lattice dimension forms a strain in the second semiconductor material. A gate structure and source and drain regions are formed on the second semiconductor material.
-
公开(公告)号：US10177237B2
公开(公告)日：2019-01-08
申请号：US15782380
申请日：2017-10-12
发明人： Kangguo Cheng , Ruilong Xie , Tenko Yamashita
IPC分类号： H01L21/8234 , H01L29/49 , H01L29/66 , H01L21/311 , H01L21/31 , H01L21/283 , H01L21/768 , H01L23/522 , H01L21/764 , H01L21/28 , H01L29/417 , H01L29/423 , H01L29/78 , H01L29/40 , H01L21/8238 , H01L29/51
摘要： A semiconductor device that includes a gate structure on a channel region of a semiconductor device. Source and drain regions may be present on opposing sides of the channel region. The semiconductor device may further include a composite gate sidewall spacer present on a sidewall of the gate structure. The composite gate sidewall spacer may include a first composition portion having an air gap encapsulated therein, and a second composition portion that is entirely solid and present atop the first composition portion.
-
4.发明申请公开(公告)号：US20180182867A1
公开(公告)日：2018-06-28
申请号：US15901447
申请日：2018-02-21
发明人： Kangguo Cheng , Ruilong Xie , Tenko Yamashita
IPC分类号： H01L29/66 , H01L29/78 , H01L21/225
CPC分类号： H01L29/66795 , H01L21/225 , H01L21/823807 , H01L21/823821 , H01L27/0924 , H01L29/1083 , H01L29/165 , H01L29/66803 , H01L29/7848 , H01L29/785
摘要： A method of forming semiconductor devices that includes forming an oxide that is doped with a punch through dopant on a surface of a first semiconductor material having a first lattice dimension, and diffusing punch through dopant from the oxide into the semiconductor material to provide a punch through stop region. The oxide may then be removed. A second semiconductor material may be formed having a second lattice dimension on the first semiconductor material having the first lattice dimension. A difference between the first lattice dimension and the second lattice dimension forms a strain in the second semiconductor material. A gate structure and source and drain regions are formed on the second semiconductor material.
-
公开(公告)号：US09966430B2
公开(公告)日：2018-05-08
申请号：US15202983
申请日：2016-07-06
发明人： Kangguo Cheng , Xin Miao , Ruilong Xie , Tenko Yamashita
IPC分类号： H01L29/06 , H01L21/8238 , H01L21/84 , H01L21/265 , H01L21/02 , H01L29/66 , H01L29/775 , H01L29/786 , H01L29/423 , H01L27/092 , H01L27/12
CPC分类号： H01L29/0673 , B82Y10/00 , H01L21/02236 , H01L21/02238 , H01L21/02252 , H01L21/02532 , H01L21/02603 , H01L21/26566 , H01L21/823807 , H01L21/84 , H01L27/092 , H01L27/0922 , H01L27/1203 , H01L29/0649 , H01L29/42392 , H01L29/66439 , H01L29/66545 , H01L29/66742 , H01L29/66795 , H01L29/775 , H01L29/78606 , H01L29/78618 , H01L29/78654 , H01L29/78684 , H01L29/78696
摘要： A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.
-
公开(公告)号：US20180090327A1
公开(公告)日：2018-03-29
申请号：US15825409
申请日：2017-11-29
发明人： Xiuyu Cai , Kangguo Cheng , Ali Khakifirooz , Ruilong Xie
CPC分类号： H01L29/7856 , H01L21/0217 , H01L21/28141 , H01L21/3212 , H01L29/42364 , H01L29/6653 , H01L29/66545 , H01L29/6656 , H01L29/66575 , H01L29/785 , H01L29/78654
摘要： A semiconductor structure includes a substrate, and a replacement metal gate (RMG) structure is attached to the substrate. The RMG structure includes a lower portion and an upper tapered portion. A source junction is disposed on the substrate and attached to a first low-k spacer portion. A drain junction is disposed on the substrate and attached to a second low-k spacer portion. A first oxide layer is disposed on the source junction, and attached to the first low-k spacer portion. A second oxide layer is disposed on the drain junction, and attached to the second low-k spacer portion. A cap layer is disposed on a top surface layer of the RMG structure and attached to the first oxide layer and the second oxide layer.
-
公开(公告)号：US09917162B2
公开(公告)日：2018-03-13
申请号：US15353352
申请日：2016-11-16
发明人： Kangguo Cheng , Ruilong Xie , Tenko Yamashita , Chun-Chen Yeh
IPC分类号： H01L29/417 , H01L21/28 , H01L29/78 , H01L21/02 , H01L29/66
CPC分类号： H01L29/41741 , H01L21/02266 , H01L21/28114 , H01L21/28123 , H01L21/3065 , H01L21/308 , H01L29/42392 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/66553 , H01L29/66666 , H01L29/66787 , H01L29/7827 , H01L29/78618 , H01L29/78642 , H01L29/78696
摘要： A method of forming a gate structure, including forming one or more vertical fins on a substrate; forming a bottom spacer on the substrate surface adjacent to the one or more vertical fins; forming a gate structure on at least a portion of the sidewalls of the one or more vertical fins; forming a gauge layer on at least a portion of the bottom spacer, wherein the gauge layer covers at least a portion of the gate structure on the sidewalls of the one or more vertical fins; and removing a portion of the gauge layer on the bottom spacer.
-
公开(公告)号：US20180068858A1
公开(公告)日：2018-03-08
申请号：US15801458
申请日：2017-11-02
发明人： Kangguo Cheng , Ruilong Xie , Tenko Yamashita
IPC分类号： H01L21/285 , H01L21/283 , H01L21/8234 , H01L27/088 , H01L29/08
CPC分类号： H01L21/28518 , H01L21/283 , H01L21/76897 , H01L21/823418 , H01L21/823431 , H01L21/823475 , H01L27/0886 , H01L29/0847 , H01L29/41791 , H01L29/45 , H01L29/456 , H01L29/665 , H01L29/66795 , H01L29/7851 , H01L2029/7858
摘要： A method of making a semiconductor device includes forming a recessed fin in a substrate, the recessed fin being substantially flush with a surface of the substrate; performing an epitaxial growth process over the recessed fin to form a source/drain over the recessed fin; and disposing a conductive metal around the source/drain.
-
公开(公告)号：US20180053831A1
公开(公告)日：2018-02-22
申请号：US15782380
申请日：2017-10-12
发明人： Kangguo Cheng , Ruilong Xie , Tenko Yamashita
IPC分类号： H01L29/49 , H01L29/66 , H01L21/28 , H01L21/8234 , H01L21/8238
CPC分类号： H01L29/4991 , H01L21/28114 , H01L21/28132 , H01L21/283 , H01L21/31 , H01L21/31111 , H01L21/764 , H01L21/76802 , H01L21/7682 , H01L21/76879 , H01L21/823468 , H01L21/823864 , H01L23/5226 , H01L29/401 , H01L29/41775 , H01L29/41791 , H01L29/42376 , H01L29/515 , H01L29/517 , H01L29/6653 , H01L29/66545 , H01L29/6656 , H01L29/66795 , H01L29/785 , H01L29/7851
摘要： A semiconductor device that includes a gate structure on a channel region of a semiconductor device. Source and drain regions may be present on opposing sides of the channel region. The semiconductor device may further include a composite gate sidewall spacer present on a sidewall of the gate structure. The composite gate sidewall spacer may include a first composition portion having an air gap encapsulated therein, and a second composition portion that is entirely solid and present atop the first composition portion.
-
公开(公告)号：US20170213741A1
公开(公告)日：2017-07-27
申请号：US15483346
申请日：2017-04-10
发明人： Kangguo Cheng , Ruilong Xie , Tenko Yamashita
IPC分类号： H01L21/308 , H01L21/306 , H01L29/66 , H01L21/02 , H01L21/3065
CPC分类号： H01L21/3086 , H01L21/02164 , H01L21/02233 , H01L21/02238 , H01L21/02255 , H01L21/30604 , H01L21/3065 , H01L21/3081 , H01L21/31 , H01L21/324 , H01L29/66795
摘要： A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etching process to remove a portion of the fin to cut the fin into a first and second cut fin, the first cut fin having a first and second fin end and the second cut fin having a first and second fin end; forming an oxide layer along an endwall of the first fin end and an endwall of the second fin end of the first cut fin, and an endwall of the first fin end and an endwall of the second fin end of the second cut fin; disposing a liner onto the oxide layer disposed onto the endwall of the first fin end of the first cut fin to form a bilayer liner; and performing a second etching process to remove a portion of the second cut fin.
-
-
-
-
-
-
-
-
-
搜索结果
4100 条记录 (耗时 0.038 秒)
