Abstract:
In some examples, memristive dot product circuit based floating point computations may include ascertaining a matrix and a vector including floating point values, and partitioning the matrix into a plurality of sub-matrices according to a size of a plurality of memristive dot product circuits. For each sub-matrix of the plurality of sub-matrices, the floating point values may be converted to fixed point values. Based on the conversion and selected ones of the plurality of memristive dot product circuits, a dot product operation may be performed with respect to a sub-matrix and the vector. Each ones of the plurality of memristive dot product circuits may include rows including word line voltages corresponding to the floating point values of the vector, conductances corresponding to the floating point values of an associated sub-matrix, and columns that include bitline currents corresponding to dot products of the voltages and conductances.
Abstract:
A method for remapping a memory location in a memory array is described. The method includes receiving, by a memory manager, an identification of a first memory location in a memory array that is to be remapped using a remapping procedure performed by a memory manager. The remapping procedure includes selecting a second memory location to store data intended for the first memory location. The procedure also includes writing, in the first memory location, a pointer to the second memory location.
Abstract:
A method to access two memory cells include determining a first cell current flowing through a first memory cell by subtracting a sneak current associated with the first memory cell from a first access current of the first bitline and determining a second cell current flowing through a second memory cell in the first bitline or a second bitline by subtracting the sneak current associated with the first memory cell from a second access current of the first bitline or the second bitline.
Abstract:
A method for identifying memory regions that contain remapped memory locations is described. The method includes determining, from a number of tracking bits on a memory module controller, whether a memory region comprises a remapped memory location. The method further includes performing a remapped memory operation on the memory region based on the determination, wherein memory within a computing device is divided into a number of memory regions including the memory region.
Abstract:
In an example, a method includes receiving input data and dividing the input data into a plurality of data portions, wherein the size of each data portion is based on a significance level. The input data may be assigned to at least one resistive memory array. Assigning the input data to at least one resistive memory array may comprises at least one of (i) assigning at least one data portion of the input data to be represented by a resistive memory array representing a number of bits, wherein the number of bits represented within the resistive memory array is based on the size of the at least one data portion; and (ii) processing each data portion of the input data with at least one resistive memory array.
Abstract:
Examples disclosed herein include a dot product engine, which includes a resistive memory array to receive an input vector, perform a dot product operation on the input vector and a stored vector stored in the memory array, and output an analog signal representing a result of the dot product operation. The dot product engine includes a stored negation indicator to indicate whether elements of the stored vector have been negated, and a digital circuit to generate a digital dot product result value based on the analog signal and the stored negation indicator.
Abstract:
Examples herein relate to convolution accelerators. An example convolution accelerator may include a transformation crossbar array programmed to calculate a Fourier Transformation of a first vector with a transformation matrix and a Fourier Transformation of a second vector with the transformation matrix. A circuit of the example convolution accelerator may multiply the Fourier Transformation of the first vector with the Fourier Transformation of the second vector to calculate a product vector. The example convolution accelerator may have an inverse transformation crossbar array programmed to calculate an Inverse Fourier Transformation of the product vector according to an inverse transformation matrix.
Abstract:
A method for encoding data in a memory array is described. The method includes receiving data to be stored in the memory array. The method also includes encoding the data, to generate a number of encoded data versions. The method also includes selecting, based on a number of optimization heuristics, which of a number of data versions to store in the memory array. The number of data versions include the number of encoded data versions and the data. The method also includes indicating, in metadata associated with the data, the selected data version. The method also includes writing the selected data version, the metadata, or combination thereof, to the memory array.