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    Semiconductor device and method of manufacturing the same
    1.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US07888737B2

    公开(公告)日：2011-02-15

    申请号：US12360165

    申请日：2009-01-27

    申请人： Hiroyuki Fujimoto ,  Yuki Togashi

    发明人： Hiroyuki Fujimoto ,  Yuki Togashi

    IPC分类号： H01L27/12

    CPC分类号： H01L23/535 ,  H01L21/28525 ,  H01L21/76879 ,  H01L21/84 ,  H01L27/0688 ,  H01L29/66772 ,  H01L29/7828 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes: a monocrystalline substrate; an inter-layer film formed on the monocrystalline substrate; a contact hole penetrating the inter-layer film and partially exposing an upper surface of the monocrystalline substrate; a sidewall formed on an inner surface of the contact hole; a plurality of first monocrystalline layers which include few defects, fill the contact hole, and cover the inter-layer film; and a plurality of second monocrystalline layers which include many defects and cover the sidewall and an upper surface of the inter-layer film so as to be sandwiched between the first monocrystalline layers and the inter-layer film.

    摘要翻译： 半导体器件包括：单晶衬底; 形成在单晶衬底上的层间膜; 穿透层间膜并且部分地暴露单晶衬底的上表面的接触孔; 形成在所述接触孔的内表面上的侧壁; 包含少量缺陷的多个第一单晶层，填充接触孔，并覆盖层间膜; 以及包含许多缺陷并覆盖层间膜的侧壁和上表面的多个第二单晶层，以夹在第一单晶层和层间膜之间。

    Semiconductor device having efficient capacitor arrangement
    2.
    发明授权
    Semiconductor device having efficient capacitor arrangement 有权
    具有高效电容器布置的半导体器件

    公开(公告)号：US09177947B2

    公开(公告)日：2015-11-03

    申请号：US12628474

    申请日：2009-12-01

    申请人： Hiroyuki Fujimoto

    发明人： Hiroyuki Fujimoto

    IPC分类号： H01L47/00 ,  H01L27/02 ,  H01L27/108 ,  H01L49/02 ,  H01L27/24 ,  H01L45/00

    CPC分类号： H01L27/0207 ,  H01L27/10841 ,  H01L27/10852 ,  H01L27/2454 ,  H01L27/2463 ,  H01L28/91 ,  H01L45/04 ,  H01L45/06 ,  H01L45/144 ,  H01L45/147

    摘要： The invention includes: multiple bit lines b1 to b5 arranged in parallel to each other at a first line pitch; multiple word lines w1 to w4 arranged in parallel to each other at a second line pitch greater than the first line pitch and intersecting with bit lines b1 to b5; and multiple capacitors. Respective center positions 4 of the multiple capacitors lie above the bit lines and are displaced by given distance C from the intersection of the bit line and the word line in a direction of arranging the word lines.

    摘要翻译： 本发明包括：以第一线间距彼此平行布置的多个位线b1至b5; 多个字线w1〜w4以大于第一线间距的第二线间距彼此平行布置并与位线b1至b5相交; 和多个电容器。 多个电容器的相应中心位置4位于位线之上，并且在排列字线的方向上从位线和字线的交点偏移给定距离C.

    Semiconductor device manufacturing method, and semiconductor device
    3.
    发明授权
    Semiconductor device manufacturing method, and semiconductor device 失效
    半导体器件制造方法和半导体器件

    公开(公告)号：US08017468B2

    公开(公告)日：2011-09-13

    申请号：US12349595

    申请日：2009-01-07

    申请人： Hiroyuki Fujimoto

    发明人： Hiroyuki Fujimoto

    IPC分类号： H01L21/22

    CPC分类号： H01L29/7827 ,  H01L27/10876 ,  H01L29/66666

    摘要： A method of manufacturing a semiconductor device in which the formation of buried wiring is facilitated includes: forming columnar patterns, which are arranged in a two-dimensional array, and bridge patterns, which connect the columnar patterns in a column direction, on a main surface of a silicon substrate; injecting an impurity in a surface portion of each of the columnar patterns and bridge patterns and in surface portions of the silicon substrate, thereby forming impurity injection layers; forming a side wall on sides of the columnar patterns and bridge patterns; removing the impurity injection layer, which has been formed in the silicon substrate, with the exception of the impurity injection layer covered by the bottom portions of the side walls; removing the side walls by etch-back; and thermally oxidizing the surface portion of the bridge patterns and then etching away the same. Buried wiring extending in the column direction of the columnar patterns is formed within the silicon substrate.

    摘要翻译： 制造掩埋布线形成的半导体器件的方法包括：形成以二维阵列布置的柱状图案和将柱状图案沿列方向连接在主表面上的桥接图案 的硅衬底; 在每个柱状图案和桥接图案的表面部分和硅衬底的表面部分中注入杂质，从而形成杂质注入层; 在柱状图案和桥形图案的侧面上形成侧壁; 去除已经形成在硅衬底中的杂质注入层，除了由侧壁的底部覆盖的杂质注入层之外; 通过蚀刻去除侧壁; 并对桥状图案的表面部分进行热氧化，然后将其蚀刻掉。 在硅衬底内形成在柱状图案的列方向上延伸的埋入布线。

    NONAQUEOUS ELECTROLYTE SECONDARY BATTERY
    4.
    发明申请
    NONAQUEOUS ELECTROLYTE SECONDARY BATTERY 审中-公开
    非电解电解质二次电池

    公开(公告)号：US20110195309A1

    公开(公告)日：2011-08-11

    申请号：US13023951

    申请日：2011-02-09

    申请人： Fumiharu Nina ,  Akihiro Suzuki ,  Shingo Tode ,  Toshikazu Yoshida ,  Yoshinori Kida ,  Hiroyuki Fujimoto

    发明人： Fumiharu Nina ,  Akihiro Suzuki ,  Shingo Tode ,  Toshikazu Yoshida ,  Yoshinori Kida ,  Hiroyuki Fujimoto

    IPC分类号： H01M4/52 ,  H01M4/50

    CPC分类号： H01M10/0525 ,  H01M4/485 ,  H01M4/505 ,  H01M4/525 ,  Y02E60/122 ,  Y02T10/7011

    摘要： A positive electrode active material of a nonaqueous electrolyte secondary battery is improved by using an inexpensive lithium transition metal oxide containing nickel and manganese as main components. Output characteristics of the battery under various temperature conditions are thereby improved, and the battery is suitable as a power supply of a hybrid vehicle. The battery includes a positive electrode including a positive electrode active material, a negative electrode including a negative electrode active material, and a nonaqueous electrolyte prepared by dissolving a solute in a nonaqueous solvent. The positive electrode active material includes positive electrode active material particles composed of a lithium transition metal complex oxide having a layered structure containing nickel and manganese as main components, and at least one niobium-containing material selected from a Li—Nb—O compound and a Li—Ni—Nb—O compound, the at least one niobium-containing material being sintered onto surfaces of the positive electrode active material particles.

    摘要翻译： 通过使用廉价的含有镍和锰的锂过渡金属氧化物作为主要成分，提高了非水电解质二次电池的正极活性物质。 因此，在各种温度条件下的电池的输出特性得到改善，并且电池适合作为混合动力车辆的电源。 该电池包括正极，其包括正极活性物质，负极包括负极活性物质，以及通过将溶质溶解在非水溶剂中制备的非水电解质。 正极活性物质包括由具有镍和锰作为主要成分的层状结构的锂过渡金属复合氧化物构成的正极活性物质粒子，以及选自Li-Nb-O系化合物和 Li-Ni-Nb-O化合物，将至少一种含铌材料烧结在正极活性物质颗粒的表面上。

    Semiconductor device and method for manufacturing the same
    5.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US07833867B2

    公开(公告)日：2010-11-16

    申请号：US12292008

    申请日：2008-11-10

    申请人： Hiroyuki Fujimoto

    发明人： Hiroyuki Fujimoto

    IPC分类号： H01L21/336

    CPC分类号： H01L29/785 ,  H01L21/823431 ,  H01L21/823437 ,  H01L29/66818

    摘要： A sacrifice oxide film is formed in a Fin semiconductor substrate portion, and impurities are then implanted in the semiconductor substrate through a mask pattern as a mask. Thereafter, the sacrifice oxide film is removed to expose the semiconductor substrate. A gate insulating film is then formed on the exposed semiconductor substrate.

    摘要翻译： 在Fin半导体衬底部分中形成牺牲氧化物膜，然后通过掩模图案作为掩模将杂质注入到半导体衬底中。 此后，去除牺牲氧化物膜以露出半导体衬底。 然后在暴露的半导体衬底上形成栅极绝缘膜。

    COMPOSITE NEGATIVE ELECTRODE ACTIVE MATERIAL AND NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY
    6.
    发明申请
    COMPOSITE NEGATIVE ELECTRODE ACTIVE MATERIAL AND NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY 有权
    复合负极电极活性材料和非水电解质二次电池

    公开(公告)号：US20100178563A1

    公开(公告)日：2010-07-15

    申请号：US12602560

    申请日：2008-06-02

    申请人： Yoshiyuki Ozaki ,  Hiroyuki Fujimoto

    发明人： Yoshiyuki Ozaki ,  Hiroyuki Fujimoto

    IPC分类号： H01M4/583

    CPC分类号： H01M4/587

    摘要： Disclosed is a composite negative electrode active material including a graphitizable carbon material containing a layered structure formed of stacked carbon layers partially having a three-dimensional regularity, and a low crystalline carbon material. A negative electrode including the composite negative electrode active material is used to produce a non-aqueous electrolyte secondary battery. The non-aqueous electrolyte secondary battery thus produced has a high energy density and demonstrates a high output/input performance for a long period of time in various environments of high to low temperatures.

    摘要翻译： 公开了一种复合负极活性物质，其包含含有部分具有三维规则性的堆叠碳层形成的层状结构的石墨化碳材料和低结晶性碳材料。 使用包含复合负极活性物质的负极来制造非水电解质二次电池。 由此制造的非水电解质二次电池具有高能量密度，并且在高低温的各种环境中长时间表现出高的输出/输入性能。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20100133497A1

    公开(公告)日：2010-06-03

    申请号：US12628474

    申请日：2009-12-01

    申请人： Hiroyuki Fujimoto

    发明人： Hiroyuki Fujimoto

    IPC分类号： H01L47/00 ,  H01L29/92 ,  H01L27/06 ,  H01L21/02 ,  H01L21/336

    CPC分类号： H01L27/0207 ,  H01L27/10841 ,  H01L27/10852 ,  H01L27/2454 ,  H01L27/2463 ,  H01L28/91 ,  H01L45/04 ,  H01L45/06 ,  H01L45/144 ,  H01L45/147

    摘要： The invention includes: multiple bit lines b1 to b5 arranged in parallel to each other at a first line pitch; multiple word lines w1 to w4 arranged in parallel to each other at a second line pitch greater than the first line pitch and intersecting with bit lines b1 to b5; and multiple capacitors. Respective center positions 4 of the multiple capacitors lie above the bit lines and are displaced by given distance C from the intersection of the bit line and the word line in a direction of arranging the word lines.

    摘要翻译： 本发明包括：以第一线间距彼此平行布置的多个位线b1至b5; 多个字线w1〜w4以大于第一线间距的第二线间距彼此平行布置并与位线b1至b5相交; 和多个电容器。 多个电容器的相应中心位置4位于位线之上，并且在排列字线的方向上从位线和字线的交点偏移给定距离C.