公开(公告)号：US20240055256A1

公开(公告)日：2024-02-15

申请号：US18231176

申请日：2023-08-07

Applicant: Infineon Technologies AG

Inventor： Ravi Keshav JOSHI ,  Kristijan Luka MLETSCHNIG ,  Axel KÖNIG ,  Gregor LANGER

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/04 ,  H01L29/45

CPC classification number: H01L21/0485 ,  H01L29/1608 ,  H01L29/04 ,  H01L29/45

Abstract: The disclosure relates to a method for manufacturing a contact on a silicon carbide semiconductor substrate and to a silicon carbide semiconductor device comprising a crystalline silicon carbide semiconductor substrate and a contact layer directly in contact with the silicon carbide semiconductor substrate surface and having, at an interface to the semiconductor substrate, a contact phase portion comprising at least a metal, silicon, and carbon. The method comprises the acts of providing a crystalline silicon carbide semiconductor substrate, depositing a metallic contact material layer onto the crystalline silicon carbide semiconductor substrate, and irradiating at least a part of the silicon carbide semiconductor substrate and at least a part of the metallic contact material layer at their interface with at least one thermal annealing laser beam, thereby generating a contact phase portion at the interface, wherein the contact phase portion comprises at least a metal, silicon, and carbon.

公开(公告)号：US20230238442A1

公开(公告)日：2023-07-27

申请号：US18097656

申请日：2023-01-17

Applicant: Infineon Technologies AG

Inventor： Ravi Keshav JOSHI ,  Romain ESTEVE ,  Saurabh ROY ,  Bernhard GOLLER ,  Werner SCHUSTEREDER ,  Kristijan Luka MLETSCHNIG

IPC: H01L29/45 ,  H01L29/417 ,  H01L23/528 ,  H01L29/40 ,  H01L21/321

CPC classification number: H01L29/45 ,  H01L29/41741 ,  H01L23/528 ,  H01L29/401 ,  H01L21/321

Abstract: A semiconductor device includes a semiconductor substrate and a metal nitride layer above the semiconductor substrate. The metal nitride layer forms at least one interface region with the semiconductor substrate. The at least one interface region includes a first portion of the semiconductor substrate, a first portion of the metal nitride layer, and an interface between the first portion of the semiconductor substrate and the first portion of the metal nitride layer. A concentration of nitrogen content at the first portion of the metal nitride layer is higher than a concentration of nitrogen content at a second portion, of the metal nitride layer, outside the interface region. A distribution of nitrogen content throughout the metal nitride layer may have a maximum concentration at the first portion of the metal nitride layer. Alternatively and/or additionally, a method for producing such a semiconductor device is provided herein.

公开(公告)号：US20210193435A1

公开(公告)日：2021-06-24

申请号：US17127309

申请日：2020-12-18

Applicant: Infineon Technologies AG

Inventor： Moriz JELINEK ,  Michael HELL ,  Caspar LEENDERTZ ,  Kristijan Luka MLETSCHNIG ,  Hans-Joachim SCHULZE

IPC: H01J37/317 ,  H01L21/265

Abstract: In an example, a substrate is oriented to a target axis, wherein a residual angular misalignment between the target axis and a preselected crystal channel direction in the substrate is within an angular tolerance interval. Dopant ions are implanted into the substrate using an ion beam that propagates along an ion beam axis. The dopant ions are implanted at implant angles between the ion beam axis and the target axis. The implant angles are within an implant angle range. A channel acceptance width is effective for the preselected crystal channel direction. The implant angle range is greater than 80% of a sum of the channel acceptance width and twofold the angular tolerance interval. The implant angle range is smaller than 500% of the sum of the channel acceptance width and twofold the angular tolerance interval.

公开(公告)号：US20250113592A1

公开(公告)日：2025-04-03

申请号：US18374895

申请日：2023-09-29

Applicant: Infineon Technologies AG

Inventor： Ravi Keshav JOSHI ,  Fabian RASINGER ,  Kristijan Luka MLETSCHNIG ,  Romain ESTEVE ,  Caspar LEENDERTZ

IPC: H01L27/07 ,  H01L29/423 ,  H01L29/78 ,  H01L29/872

Abstract: In an embodiment, a semiconductor device is provided. The semiconductor device may include a semiconductor body including a first doped region of a first conductivity type and a second doped region of a second conductivity type. The semiconductor device may include a metal structure, in the semiconductor body, overlying the second doped region. The metal structure may include a first sidewall adjacent a first portion of the first doped region, a second sidewall adjacent a second portion of the first doped region, and a third sidewall adjacent the second doped region. The semiconductor device may include a Schottky contact including a junction of the third sidewall of the metal structure with the second doped region.

公开(公告)号：US20240145247A1

公开(公告)日：2024-05-02

申请号：US18407587

申请日：2024-01-09

Applicant: Infineon Technologies AG

Inventor： Moriz JELINEK ,  Michael HELL ,  Caspar LEENDERTZ ,  Kristijan Luka MLETSCHNIG ,  Hans-Joachim SCHULZE

IPC: H01L21/265 ,  H01J37/317 ,  H01L21/04 ,  H01L29/36

CPC classification number: H01L21/26586 ,  H01J37/3171 ,  H01L21/046 ,  H01L21/047 ,  H01L21/265 ,  H01L21/2652 ,  H01L29/36 ,  H01J2237/24578 ,  H01J2237/31703

Abstract: In an example, a substrate is oriented to a target axis, wherein a residual angular misalignment between the target axis and a preselected crystal channel direction in the substrate is within an angular tolerance interval. Dopant ions are implanted into the substrate using an ion beam that propagates along an ion beam axis. The dopant ions are implanted at implant angles between the ion beam axis and the target axis. The implant angles are within an implant angle range. A channel acceptance width is effective for the preselected crystal channel direction. The implant angle range is greater than 80% of a sum of the channel acceptance width and twofold the angular tolerance interval. The implant angle range is smaller than 500% of the sum of the channel acceptance width and twofold the angular tolerance interval.

公开(公告)号：US20230215729A1

公开(公告)日：2023-07-06

申请号：US18090673

申请日：2022-12-29

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim SCHULZE ,  Florian Markus GRASSE ,  Moriz JELINEK ,  Axel KÖNIG ,  Gregor LANGER ,  Bemhard LEITL ,  Kristijan Luka MLETSCHNIG ,  Werner SCHUSTEREDER

IPC: H01L21/04 ,  H01L29/45 ,  H01L29/06 ,  H01L21/265

CPC classification number: H01L21/0485 ,  H01L29/45 ,  H01L29/06 ,  H01L21/26513 ,  H01L29/04

Abstract: A method of manufacturing a metal silicide layer comprises performing laser thermal annealing of a surface region of a silicon carbide (SiC) substrate, exposing a surface of a thus obtained silicon layer, depositing a metal layer above the exposed silicon layer, and/or thermally treating a stack of layers, comprising the silicon layer and the metal layer, to form a metal silicide layer. Alternatively and/or additionally, the method may comprise depositing a silicon layer above a SiC substrate, depositing a metal layer, and/or performing laser thermal annealing of the SiC substrate and a stack of layers above the SiC substrate to form a metal silicide layer, wherein the stack of layers comprises the silicon layer and the metal layer. Moreover, a semiconductor device is described, comprising a SiC substrate, a metal silicide layer, and a polycrystalline layer in direct contact with the SiC substrate and the metal silicide layer.