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142 条记录 (耗时 0.029 秒)

    Data recording apparatus, data reproducing apparatus, data recording method, and data reproducing method
    1.
    发明授权
    Data recording apparatus, data reproducing apparatus, data recording method, and data reproducing method 失效
    数据记录装置，数据再现装置，数据记录方法和数据再现方法

    公开(公告)号：US07751686B2

    公开(公告)日：2010-07-06

    申请号：US10088037

    申请日：2001-07-09

    申请人： Kenji Morimoto ,  Hirofumi Nakagaki ,  Yoshiyasu Kuramoto ,  Atsuo Ochi ,  Etsuto Nakatsu

    发明人： Kenji Morimoto ,  Hirofumi Nakagaki ,  Yoshiyasu Kuramoto ,  Atsuo Ochi ,  Etsuto Nakatsu

    IPC分类号： H04N5/783

    CPC分类号： G11B20/10 ,  G11B2020/10537 ,  G11B2020/10981 ,  H04N5/78263 ,  H04N5/783 ,  H04N9/7921 ,  H04N9/8042 ,  H04N9/8227

    摘要： In the case where rate information is not transmitted on an input bit stream, it was difficult to efficiently record the input bit stream in accordance with the rate of the input bit stream. Therefore, a data recording apparatus is realized which comprises: signal processing means of coding the input bit stream to a recording signal; a packet counter section that counts the number of packets serving as constituting units of the input bit stream, for a fixed time period; a system controller that controls a recording rate on a tape-like recording medium; and recording means of recording the recording signal on the tape-like recording medium, and which is configured so as to calculate the rate of the input bit stream from an output of the packet counter section to control the recording rate, whereby recording can be efficiently conducted in accordance with the rate of an input signal.

    摘要翻译： 在不在输入比特流上传送速率信息的情况下，难以根据输入比特流的速率有效地记录输入比特流。 因此，实现了一种数据记录装置，其包括：将输入比特流编码为记录信号的信号处理装置; 分组计数器部分，用于对固定时间段内用作输入比特流的构成单元的分组数进行计数; 系统控制器，其控制带状记录介质上的记录速率; 以及记录装置，用于将记录信号记录在带状记录介质上，并且被配置为从分组计数器部分的输出计算输入比特流的速率以控制记录速率，由此可以有效地进行记录 根据输入信号的速率进行。

    Digital signal recording/reproducing apparatus
    2.
    发明授权
    Digital signal recording/reproducing apparatus 失效
    数字信号记录/再现装置

    公开(公告)号：US06556776B1

    公开(公告)日：2003-04-29

    申请号：US09214863

    申请日：1999-01-13

    申请人： Atsuo Ochi ,  Hirofumi Nakagaki ,  Kenji Morimoto ,  Naoshi Usuki

    发明人： Atsuo Ochi ,  Hirofumi Nakagaki ,  Kenji Morimoto ,  Naoshi Usuki

    IPC分类号： H04N591

    CPC分类号： H04N9/7921 ,  H04N5/775

    摘要： A digital signal recording and reproducing apparatus has the following components: a digital information decoding circuit for outputting (a) a received digital information signal by selecting a channel, and (b) a first analog signal by selecting and decoding either one of a selected digital information signal, and a reproduced digital information signal of a recording medium; a recording and reproducing unit for outputting a reproduced digital signal, comprising (a) a digital signal recording unit for inputting the digital information signal of the channel selected and output by the digital information decoding circuit, and for recording on the recording medium, (b) a digital signal reproduction unit for reproducing the digital signal recorded on the recording medium, and (c) a first recording and reproduction unit for recording and reproducing an externally input analog video/audio signal on the recording medium as a second analog signal; a bus line for transmitting (a) the digital information signal of the channel selected and output by the digital information decoding circuit to the recording and reproducing unit, and (b) a digital information signal output by the recording and reproducing unit to the digital information decoding circuit; and an analog information selecting circuit for selecting and outputting either one of (a) the first analog signal decoded by the digital information decoding circuit, and (b) the second analog signal reproduced by the recording and reproducing unit.

    摘要翻译： 数字信号记录和再现装置具有以下部件：数字信息解码电路，用于通过选择一个通道来输出（a）接收到的数字信息信号;以及（b）第一模拟信号，通过选择和解码选择的数字信号 信息信号和记录介质的再现数字信息信号; 用于输出再现的数字信号的记录和再现单元，包括：（a）数字信号记录单元，用于输入由数字信息解码电路选择和输出的通道的数字信息信号，并在记录介质上记录（b ）数字信号再现单元，用于再现记录在记录介质上的数字信号;以及（c）第一记录和再现单元，用于在记录介质上记录和再现外部输入的模拟视频/音频信号作为第二模拟信号; 用于将由数字信息解码电路选择和输出的信道的数字信息信号发送到记录和再现单元的总线;以及（b）由记录和再现单元输出的数字信息信号到数字信息 解码电路; 以及模拟信息选择电路，用于选择和输出（a）由数字信息解码电路解码的第一模拟信号中的任一个，以及（b）由记录和再现单元再现的第二模拟信号。

    DC-DC converter including regeneration snubber circuit
    4.
    发明授权
    DC-DC converter including regeneration snubber circuit 有权
    DC-DC转换器包括再生缓冲电路

    公开(公告)号：US08873259B2

    公开(公告)日：2014-10-28

    申请号：US12680240

    申请日：2009-02-25

    申请人： Toshikazu Fujiyoshi ,  Hajime Katsushima ,  Kenji Morimoto ,  Satoshi Yamamura

    发明人： Toshikazu Fujiyoshi ,  Hajime Katsushima ,  Kenji Morimoto ,  Satoshi Yamamura

    IPC分类号： H02H7/122 ,  H02M1/34 ,  H02M3/335

    CPC分类号： H02M3/33569 ,  H02M1/34 ,  H02M2001/342 ,  Y02B70/1491

    摘要： A DC-DC converter includes a regeneration snubber circuit. The snubber circuit is connected in parallel with the secondary diode circuit and includes a series circuit of a discharge blocking diode, a snubber capacitor, and a switching element for regeneration connected in parallel with the discharge blocking diode. The DC-DC converter further includes a control unit which turns the switching element for regeneration on a predetermined time period after the timing of turning the primary side switching element off. The predetermined time period is set to approximately the time period during which the charge, accumulated in the snubber capacitor due to reverse recovery time when one of the secondary diodes has been turned off, discharges.

    摘要翻译： DC-DC转换器包括再生缓冲电路。 缓冲电路与次级二极管电路并联连接，并且包括放电阻塞二极管，缓冲电容器和用于与放电阻塞二极管并联连接的再生开关元件的串联电路。 DC-DC转换器还包括一个控制单元，该控制单元在关闭初级侧开关元件的定时之后的预定时间段内转动用于再生的开关元件。 预定时间周期被设定为近似于当二次二极管中的一个被截止时由于反向恢复时间而累积在缓冲电容器中的电荷放电的时间周期。

    Speech signal processing apparatus
    6.
    发明授权
    Speech signal processing apparatus 有权
    语音信号处理装置

    公开(公告)号：US08498862B2

    公开(公告)日：2013-07-30

    申请号：US12693950

    申请日：2010-01-26

    申请人： Kozo Okuda ,  Kenji Morimoto

    发明人： Kozo Okuda ,  Kenji Morimoto

    IPC分类号： G10L21/00

    CPC分类号： H04R3/005 ,  G10L21/0208 ,  G10L2021/02165 ,  H04R2201/107 ,  H04R2400/01 ,  H04R2460/13 ,  H04R2499/11

    摘要： A speech signal processing apparatus includes a control signal output unit configured to receive as an input signal either one of a first speech signal corresponding to a sound uttered by a user and a second speech signal corresponding to a sound output from an eardrum of the user when the user utters a sound, and output a control signal corresponding to a noise level of the input signal, and a speech signal output unit configured to output either one of the first speech signal and the second speech signal according to the control signal.

    摘要翻译： 语音信号处理装置包括：控制信号输出单元，被配置为接收与用户发出的声音相对应的第一语音信号中的一个作为输入信号;以及与用户的鼓膜输出的声音对应的第二语音信号; 用户发出声音，并输出与输入信号的噪声电平相对应的控制信号，以及语音信号输出单元，被配置为根据控制信号输出第一语音信号和第二语音信号中的任一个。

    REPRODUCTION DEVICE
    7.
    发明申请
    REPRODUCTION DEVICE 审中-公开
    复制设备

    公开(公告)号：US20120163766A1

    公开(公告)日：2012-06-28

    申请号：US13387779

    申请日：2010-12-16

    申请人： Kenji Morimoto

    发明人： Kenji Morimoto

    IPC分类号： H04N5/775 ,  H04N9/80 ,  H04N5/93

    CPC分类号： H04N13/398 ,  H04N13/178 ,  H04N13/183 ,  H04N13/189 ,  H04N13/341 ,  H04N13/356 ,  H04N13/361

    摘要： A three-dimensional stereoscopic image reproducing apparatus according to the embodiment has a disc reproducing unit 201 capable of reading content recorded in a disc 201, a video decoder 303 for decoding the content read by a disc reproducing unit 201 and outputting at least a video signal, a CPU 305 for generating notifying information for notifying that the content recorded in the disc 201 is 3D content when the content recorded in the disc 201 is 3D content, an output unit 206 for outputting the notifying information or the video signal decoded by the video decoder 305 to an outside of a reproducing apparatus 101. Before the video signal decoded by the decoder 201 is output to the outside of the reproducing apparatus 101, the output unit 206 outputs the notifying information to the outside of the reproducing apparatus 101.

    摘要翻译： 根据实施例的三维立体图像再现装置具有能够读取记录在盘201中的内容的盘再现单元201，用于对由盘再现单元201读取的内容进行解码的视频解码器303，并至少输出视频信号 CPU 305，用于当记录在盘201中的内容是3D内容时产生用于通知记录在盘201中的内容是3D内容的通知信息的CPU 305;用于输出通过视频解码的通知信息或视频信号的输出单元206 解码器305到再现装置101的外部。在由解码器201解码的视频信号被输出到再现装置101的外部之前，输出单元206将通知信息输出到再现装置101的外部。

    Current balanced push-pull inverter circuit with regeneration snubber circuit and voltage boost section
    8.
    发明授权
    Current balanced push-pull inverter circuit with regeneration snubber circuit and voltage boost section 有权
    具有再生缓冲电路和升压段的电流平衡推挽逆变电路

    公开(公告)号：US08107265B2

    公开(公告)日：2012-01-31

    申请号：US12864267

    申请日：2009-01-30

    申请人： Toshikazu Fujiyoshi ,  Hajime Katsushima ,  Kenji Morimoto ,  Satoshi Yamamura

    发明人： Toshikazu Fujiyoshi ,  Hajime Katsushima ,  Kenji Morimoto ,  Satoshi Yamamura

    IPC分类号： H02M3/335 ,  H02M7/538

    CPC分类号： H02M3/3372 ,  H02M2001/346 ,  Y02B70/1491 ,  Y10T307/50

    摘要： This inverter circuit includes two switching elements which are turned alternately ON and OFF, and a first primary winding connected in series between these switching elements, and also includes an output transformer having a secondary winding for obtaining an output voltage. This inverter circuit also includes a first voltage source and a second voltage source. The first voltage source applies a voltage to the first switching element via the first primary winding. And the second voltage source applies a voltage to the second switching element via the second primary winding. This inverter circuit also includes a regeneration snubber circuit for regenerating charge accumulated in a snubber capacitor. The regeneration snubber circuit includes a regeneration circuit including a voltage boost section which converts the primary side voltage of the output transformer to a predetermined voltage, which it outputs.

    摘要翻译： 该逆变器电路包括交替地接通和断开的两个开关元件和串联连接在这些开关元件之间的第一初级绕组，并且还包括具有用于获得输出电压的次级绕组的输出变压器。 该逆变器电路还包括第一电压源和第二电压源。 第一电压源经由第一初级绕组向第一开关元件施加电压。 并且第二电压源经由第二初级绕组向第二开关元件施加电压。 该逆变器电路还包括用于再生堆积在缓冲电容器中的电荷的再生缓冲电路。 再生缓冲电路包括：再生电路，其包括将输出变压器的初级侧电压转换为预定电压的升压部，其输出。