公开(公告)号：US20070072363A1

公开(公告)日：2007-03-29

申请号：US11549340

申请日：2006-10-13

申请人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

发明人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

IPC分类号： H01L21/8242

CPC分类号： H01L21/28185 ,  H01L21/02148 ,  H01L21/02271 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/3144 ,  H01L21/3162 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L29/517 ,  H01L29/518

摘要： Methods are disclosed for treating deposited gate dielectric materials, in which the deposited dielectric is subjected to one or more non-oxidizing anneals to densify the material, one or more oxidizing anneals to mitigate material defects, and to a nitridation process to introduce nitrogen into the gate dielectric. The annealing may be performed before and/or after the nitridation to mitigate deposition and/or nitridation defects and to densify the material while mitigating formation of unwanted low dielectric constant oxides at the interface between the gate dielectric and the semiconductor substrate.

公开(公告)号：US20070072364A1

公开(公告)日：2007-03-29

申请号：US11549375

申请日：2006-10-13

申请人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

发明人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

IPC分类号： H01L21/8242 ,  H01L21/336

CPC分类号： H01L21/28185 ,  H01L21/02148 ,  H01L21/02271 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/3144 ,  H01L21/3162 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L29/517 ,  H01L29/518

摘要： Methods are disclosed for treating deposited gate dielectric materials, in which the deposited dielectric is subjected to one or more non-oxidizing anneals to densify the material, one or more oxidizing anneals to mitigate material defects, and to a nitridation process to introduce nitrogen into the gate dielectric. The annealing may be performed before and/or after the nitridation to mitigate deposition and/or nitridation defects and to densify the material while mitigating formation of unwanted low dielectric constant oxides at the interface between the gate dielectric and the semiconductor substrate.

摘要翻译： 公开了用于处理沉积的栅极电介质材料的方法，其中沉积的电介质经受一个或多个非氧化退火以致密化材料，一个或多个氧化退火以减轻材料缺陷，以及氮化过程以将氮引入 栅电介质。 可以在氮化之前和/或之后进行退火以减轻沉积和/或氮化缺陷并致密材料，同时减轻在栅极电介质和半导体衬底之间的界面处形成不想要的低介电常数氧化物。

公开(公告)号：US20050130442A1

公开(公告)日：2005-06-16

申请号：US10734708

申请日：2003-12-11

申请人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

发明人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

IPC分类号： H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  H01L21/3205 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/28185 ,  H01L21/02148 ,  H01L21/02271 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/3144 ,  H01L21/3162 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L29/517 ,  H01L29/518

摘要： Methods are disclosed for treating deposited gate dielectric materials, in which the deposited dielectric is subjected to one or more non-oxidizing anneals to densify the material, one or more oxidizing anneals to mitigate material defects, and to a nitridation process to introduce nitrogen into the gate dielectric. The annealing may be performed before and/or after the nitridation to mitigate deposition and/or nitridation defects and to densify the material while mitigating formation of unwanted low dielectric constant oxides at the interface between the gate dielectric and the semiconductor substrate.

摘要翻译： 公开了用于处理沉积的栅极电介质材料的方法，其中沉积的电介质经受一个或多个非氧化退火以致密化材料，一个或多个氧化退火以减轻材料缺陷，以及氮化过程以将氮引入 栅电介质。 可以在氮化之前和/或之后进行退火以减轻沉积和/或氮化缺陷并致密材料，同时减轻在栅极电介质和半导体衬底之间的界面处形成不想要的低介电常数氧化物。

公开(公告)号：US20080044957A1

公开(公告)日：2008-02-21

申请号：US11870631

申请日：2007-10-11

申请人： James Chambers ,  Mark Visokay ,  Luigi Colombo ,  Antonio Rotondaro

发明人： James Chambers ,  Mark Visokay ,  Luigi Colombo ,  Antonio Rotondaro

IPC分类号： H01L21/84

CPC分类号： H01L21/823842

摘要： Forming metal gate transistors that have different work functions is disclosed. In one example, a first metal, which is a ‘mid gap’ metal, is manipulated in first and second regions by second and third metals, respectively, to move the work function of the first metal in opposite directions in the different regions. The resulting work functions in the different regions correspond to that of different types of the transistors that are to be formed.

摘要翻译： 公开了具有不同功函数的金属栅极晶体管。 在一个示例中，第一金属是“中间间隙”金属，分别在第一和第二区域中被第二和第三金属操纵，以在不同区域中沿相反方向移动第一金属的功函数。 在不同区域中产生的功函数对应于将要形成的不同类型的晶体管。

公开(公告)号：US20050124121A1

公开(公告)日：2005-06-09

申请号：US10731647

申请日：2003-12-09

申请人： Antonio Rotondaro ,  James Chambers ,  Mark Visokay ,  Luigi Colombo

发明人： Antonio Rotondaro ,  James Chambers ,  Mark Visokay ,  Luigi Colombo

IPC分类号： C23C16/56 ,  H01L21/28 ,  H01L21/31 ,  H01L21/314 ,  H01L21/316 ,  H01L21/336 ,  H01L21/4763 ,  H01L21/8242 ,  H01L29/51

CPC分类号： H01L21/02318 ,  C23C16/56 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/3143 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： The present invention pertains to annealing a high dielectric constant (high-k) material in a manner that substantially reduces or eliminates disadvantages and problems heretofore associated with the same. In particular, the high-k material is annealed in an ambient having a single chemistry of nitrogen and hydrogen, such as ammonia (NH3), to nitride and react unwanted impurities, and an oxidizer to oxidize and densify the high-k material, while mitigating growth of a lower-k material at an interface of the high-k material and an underlying substrate. Additionally, particular temperatures and pressures are utilized within the process so that the risk of an undesired exothermic reaction is mitigated. Annealing the high-k material in accordance with manners disclosed herein has application to semiconductor fabrication processes and, as such, is discussed herein within the context of the same.

摘要翻译： 本发明涉及以大大减少或消除与之相关的缺点和问题的方式退火高介电常数（高k）材料。 特别地，高k材料在具有氮和氢的单一化学性质（例如氨（NH 3））的环境中退火至氮化物并反应不需要的杂质，以及氧化剂氧化和 致密化高k材料，同时减轻在高k材料和下层衬底的界面处的较低k材料的生长。 此外，在该方法中利用特定的温度和压力，以便减轻不期望的放热反应的风险。 根据本文公开的方式对高k材料进行退火，已经应用于半导体制造工艺，并且因此本文在其上下文中讨论。

公开(公告)号：US20080057739A1

公开(公告)日：2008-03-06

申请号：US11924132

申请日：2007-10-25

申请人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

发明人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

IPC分类号： H01L21/469

CPC分类号： H01L21/02318 ,  C23C16/56 ,  H01L21/02323 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3143 ,  H01L21/31608 ,  H01L21/31616 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/318 ,  H01L29/518 ,  H01L29/78

摘要： A method for improving high-κ gate dielectric film (104) properties. The high-κ film (104) is subjected to a two step anneal sequence. The first anneal is performed in a reducing ambient (106) with low partial pressure of oxidizer to promote film relaxation and increase by-product diffusion and desorption. The second anneal is performed in an oxidizing ambient (108) with a low partial pressure of reducer to remove defects and impurities.

摘要翻译： 一种改善高卡门电介质膜（104）性能的方法。 对高卡帕膜（104）进行两步退火处理。 第一退火在具有低分压氧化剂的还原环境（106）中进行，以促进膜弛豫并增加副产物扩散和解吸附。 第二次退火在具有低分压还原剂的氧化环境（108）中进行以除去缺陷和杂质。

公开(公告)号：US20050136690A1

公开(公告)日：2005-06-23

申请号：US10739617

申请日：2003-12-18

申请人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

发明人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

IPC分类号： C23C16/56 ,  H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L29/51 ,  H01L29/78 ,  H01L21/31 ,  H01L21/8242 ,  H01L21/469

CPC分类号： H01L21/02318 ,  C23C16/56 ,  H01L21/02323 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3143 ,  H01L21/31608 ,  H01L21/31616 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/318 ,  H01L29/518 ,  H01L29/78

摘要： A method for improving high-κ gate dielectric film (104) properties. The high-κ film (104) is subjected to a two step anneal sequence. The first anneal is performed in a reducing ambient (106) with low partial pressure of oxidizer to promote film relaxation and increase by-product diffusion and desorption. The second anneal is performed in an oxidizing ambient (108) with a low partial pressure of reducer to remove defects and impurities.

摘要翻译： 一种改善高卡门电介质膜（104）性能的方法。 对高卡帕膜（104）进行两步退火处理。 第一退火在具有低分压氧化剂的还原环境（106）中进行，以促进膜弛豫并增加副产物扩散和解吸附。 第二次退火在具有低分压还原剂的氧化环境（108）中进行以除去缺陷和杂质。

公开(公告)号：US20050136580A1

公开(公告)日：2005-06-23

申请号：US10745313

申请日：2003-12-22

申请人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

发明人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L29/51 ,  H01L29/78 ,  H01L21/00 ,  H01L21/4763 ,  H01L21/8234

CPC分类号： H01L29/7833 ,  H01L21/823828 ,  H01L21/823857 ,  H01L29/51 ,  H01L29/6656 ,  H01L29/6659

摘要： The present invention pertains to forming a transistor in the absence of hydrogen, or in the presence of a significantly reduced amount of hydrogen. In this manner, a high-k material can be utilized to form a gate dielectric layer in the transistor and facilitate device scaling while mitigating defects that can be introduced into the high-k material by the presence of hydrogen and/or hydrogen containing compounds.

摘要翻译： 本发明涉及在不存在氢的情况下形成晶体管，或者在显着减少量的氢的存在下。 以这种方式，可以利用高k材料在晶体管中形成栅极电介质层，并且便于器件缩放，同时减轻可通过存在氢和/或含氢化合物引入高k材料的缺陷。

公开(公告)号：US20050136632A1

公开(公告)日：2005-06-23

申请号：US10738957

申请日：2003-12-17

申请人： Antonio Rotondaro ,  Mark Visokay ,  James Chambers ,  Luigi Colombo

发明人： Antonio Rotondaro ,  Mark Visokay ,  James Chambers ,  Luigi Colombo

IPC分类号： H01L21/28 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/4763 ,  H01L29/51

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518

摘要： Methods and systems are disclosed that facilitate semiconductor fabrication by fabricating transistor devices having gate dielectrics with selectable thicknesses in different regions of semiconductor devices. The thicknesses correspond to operating voltages of the corresponding transistor devices. Furthermore, the present invention also provides systems and methods that can fabricate the gate dielectrics with high-k dielectric material, which allows a thicker gate dielectric than conventional silicon dioxide.

摘要翻译： 公开了通过制造具有在半导体器件的不同区域中具有可选厚度的栅极电介质的晶体管器件来促进半导体制造的方法和系统。 厚度对应于相应的晶体管器件的工作电压。 此外，本发明还提供了可以制造具有高k电介质材料的栅极电介质的系统和方法，其允许比常规二氧化硅更厚的栅极电介质。

公开(公告)号：US20070122962A1

公开(公告)日：2007-05-31

申请号：US11620447

申请日：2007-01-05

申请人： James Chambers ,  Mark Visokay ,  Luigi Colombo

发明人： James Chambers ,  Mark Visokay ,  Luigi Colombo

IPC分类号： H01L21/8238

CPC分类号： H01L21/823857 ,  H01L21/823842 ,  Y10S438/981

摘要： The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. An I/O dielectric layer is formed in core and I/O regions of a semiconductor device (506). The I/O dielectric layer is removed (508) from the core region of the device. A core dielectric layer is formed in the core region (510). A barrier layer is deposited and patterned to expose the NMOS devices of the core region (512). The core dielectric layer is removed from the core NMOS devices (514). A high-k dielectric layer is formed (514) over the core and I/O regions. Then, the high-k dielectric layer is removed (512) from PMOS regions/devices of the core region and the NMOS and PMOS regions/devices of the I/O region.

摘要翻译： 本发明通过提供在NMOS区内选择性地形成高k电介质层的制造方法来促进半导体制造。 在半导体器件（506）的芯和I / O区域中形成I / O电介质层。 从器件的芯区域去除（508）I / O电介质层。 在芯区域（510）中形成芯介质层。 屏蔽层被沉积并图案化以暴露核心区域（512）的NMOS器件。 从核心NMOS器件（514）去除芯介质层。 在核心和I / O区域上形成高k电介质层（514）。 然后，从核心区域的PMOS区域/器件和I / O区域的NMOS和PMOS区域/器件去除高k电介质层（512）。