公开(公告)号：US08809970B2

公开(公告)日：2014-08-19

申请号：US13554204

申请日：2012-07-20

申请人： Masamichi Suzuki ,  Tatsuo Shimizu ,  Atsuhiro Kinoshita

发明人： Masamichi Suzuki ,  Tatsuo Shimizu ,  Atsuhiro Kinoshita

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L21/28 ,  H01L29/51 ,  H01L29/788 ,  H01L49/02

CPC分类号： H01L29/785 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/02266 ,  H01L21/28194 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823857 ,  H01L28/40 ,  H01L29/517 ,  H01L29/7833 ,  H01L29/7881

摘要： A semiconductor device includes a semiconductor substrate, a source region, a drain region, an insulating film and a gate electrode. The source region is formed in the semiconductor substrate. The drain region is formed in the semiconductor substrate and being separate from the source region. The insulating film is formed between the source region and the drain region and on or above the semiconductor substrate. The insulating film includes lanthanum aluminate containing at least one element selected from Si, Ge, Mg, Ca, Sr, Ba and N. The lanthanum aluminate contains at least one element selected from Ti, Hf and Zr. The gate electrode is formed on the insulating film.

摘要翻译： 半导体器件包括半导体衬底，源极区，漏极区，绝缘膜和栅电极。 源区域形成在半导体衬底中。 漏区形成在半导体衬底中并与源极区分开。 绝缘膜形成在源极区域和漏极区域之间并且在半导体衬底上或上方。 绝缘膜包括含有选自Si，Ge，Mg，Ca，Sr，Ba和N中的至少一种元素的铝酸镧铝。铝酸镧含有选自Ti，Hf和Zr中的至少一种元素。 栅电极形成在绝缘膜上。

公开(公告)号：US20120326244A1

公开(公告)日：2012-12-27

申请号：US13554204

申请日：2012-07-20

申请人： Masamichi SUZUKI ,  Tatsuo Shimizu ,  Atsuhiro Kinoshita

发明人： Masamichi SUZUKI ,  Tatsuo Shimizu ,  Atsuhiro Kinoshita

IPC分类号： H01L29/78 ,  H01L21/28

CPC分类号： H01L29/785 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/02266 ,  H01L21/28194 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823857 ,  H01L28/40 ,  H01L29/517 ,  H01L29/7833 ,  H01L29/7881

摘要： A semiconductor device includes a semiconductor substrate, a source region, a drain region, an insulating film and a gate electrode. The source region is formed in the semiconductor substrate. The drain region is formed in the semiconductor substrate with being separate from the source region. The insulating film is formed between the source region and the drain region and on or above the semiconductor substrate. The insulating film includes lanthanum aluminate containing at least one element selected from Si, Ge, Mg, Ca, Sr, Ba and N. The lanthanum aluminate contains at least one element selected from Ti, Hf and Zr. The gate electrode is formed on the insulating film.

摘要翻译： 半导体器件包括半导体衬底，源极区，漏极区，绝缘膜和栅电极。 源区域形成在半导体衬底中。 漏区形成在半导体衬底中，与源极区分开。 绝缘膜形成在源极区域和漏极区域之间并且在半导体衬底上或上方。 绝缘膜包括含有选自Si，Ge，Mg，Ca，Sr，Ba和N中的至少一种元素的铝酸镧铝。铝酸镧含有选自Ti，Hf和Zr中的至少一种元素。 栅电极形成在绝缘膜上。

公开(公告)号：US20110254062A1

公开(公告)日：2011-10-20

申请号：US13042590

申请日：2011-03-08

申请人： Tatsuo Shimizu ,  Atsuhiro Kinoshita ,  Hirotaka Nishino

发明人： Tatsuo Shimizu ,  Atsuhiro Kinoshita ,  Hirotaka Nishino

IPC分类号： H01L29/772 ,  H01L21/8238 ,  H01L21/336

CPC分类号： H01L21/823857 ,  H01L21/28185 ,  H01L21/3115 ,  H01L21/31155 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A field effect transistor which can operate at a low threshold value includes: an n-type semiconductor region; a source region and a drain region separately formed in the n-type semiconductor region; a first insulating film formed in the semiconductor region between the source region and the drain region and containing silicon and oxygen; a second insulating film formed on the first insulating film and containing at least one material selected from Hf, Zr, and Ti and oxygen; and a gate electrode formed on the second insulating film. Ge is doped in an interface region including an interface between the first insulating film and the second insulating film, and an area density of the Ge has a peak on a first insulating film side in the interface region.

摘要翻译： 可以以低阈值工作的场效应晶体管包括：n型半导体区域; 分别形成在所述n型半导体区域中的源极区域和漏极区域; 形成在源极区域和漏极区域之间并且含有硅和氧的半导体区域中的第一绝缘膜; 形成在所述第一绝缘膜上并且包含选自Hf，Zr和Ti中的至少一种材料和氧的第二绝缘膜; 以及形成在所述第二绝缘膜上的栅电极。 Ge掺杂在包括第一绝缘膜和第二绝缘膜之间的界面的界面区域中，Ge的面密度在界面区域的第一绝缘膜侧具有峰值。

公开(公告)号：US20130252559A1

公开(公告)日：2013-09-26

申请号：US13599413

申请日：2012-08-30

申请人： Jun DEGUCHI ,  Shouhei Kousai ,  Yousuke Hagiwara ,  Masamichi Suzuki ,  Atsuhiro Kinoshita ,  Takao Marukame

发明人： Jun DEGUCHI ,  Shouhei Kousai ,  Yousuke Hagiwara ,  Masamichi Suzuki ,  Atsuhiro Kinoshita ,  Takao Marukame

IPC分类号： H03M1/66

CPC分类号： H03M1/66 ,  H03M1/1061 ,  H03M1/745

摘要： In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n−1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.

摘要翻译： 通常，根据一个实施例，配置成将包括n（n> 1）位的数字信号转换为模拟电流以从输出端输出模拟电流的DA转换器包括n个电压 - 电流转换器。 它们中的每一个对应于数字信号的每个位，并且被配置为根据相应的位产生电流。 第k（k是0到n-1的整数）电压 - 电流转换器包括阈值电压可调的第一晶体管。 第一晶体管包括半导体衬底，第一扩散区，第二扩散区，绝缘膜，电荷累积膜和栅极。

公开(公告)号：US08450208B2

公开(公告)日：2013-05-28

申请号：US13081629

申请日：2011-04-07

申请人： Yoshifumi Nishi ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki

发明人： Yoshifumi Nishi ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki

IPC分类号： H01L21/283

CPC分类号： H01L21/28518 ,  H01L29/1608 ,  H01L29/41708 ,  H01L29/456 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/6609 ,  H01L29/66272 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66712 ,  H01L29/732 ,  H01L29/7833 ,  H01L29/861

摘要： In a semiconductor device manufacturing method according to an exemplary embodiment, a sulfur-containing film containing sulfur is deposited on an n-type semiconductor, a first metal film containing a first metal is deposited on the sulfur-containing film, a heat treatment is performed to form a metal semiconductor compound film by reacting the n-type semiconductor and the sulfur-containing film, and to introduce sulfur to an interface between the n-type semiconductor and the metal semiconductor compound film being formed.

摘要翻译： 在根据示例性实施例的半导体器件制造方法中，在n型半导体上沉积含硫的含硫膜，在含硫膜上沉积含有第一金属的第一金属膜，进行热处理 通过使n型半导体和含硫膜反应形成金属半导体化合物膜，并将硫引入到正在形成的n型半导体与金属半导体化合物膜之间的界面上。

公开(公告)号：US08299507B2

公开(公告)日：2012-10-30

申请号：US12714841

申请日：2010-03-01

申请人： Tatsuo Shimizu ,  Atsuhiro Kinoshita

发明人： Tatsuo Shimizu ,  Atsuhiro Kinoshita

IPC分类号： H01L29/78

CPC分类号： H01L29/6659 ,  H01L21/28176 ,  H01L21/283 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/31604 ,  H01L28/75 ,  H01L29/41775 ,  H01L29/45 ,  H01L29/456 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/7881

摘要： It is made possible to optimize the effective work function of the metal for a junction and suppress the resistance as far as possible at the interface between a semiconductor or a dielectric material and a metal. A semiconductor device includes: a semiconductor film; a Ti oxide film formed on the semiconductor film, and including at least one element selected from the group consisting of V, Cr, Mn, Fe, Co, Ni, Nb, Mo, Tc, Ru, Rh, Pd, Ta, W, Re, Os, Ir, and Pt; and a metal film formed on the Ti oxide film.

摘要翻译： 可以优化用于结的金属的有效功函数，并且尽可能地在半导体或电介质材料与金属之间的界面处抑制电阻。 半导体器件包括：半导体膜; 形成在所述半导体膜上的Ti氧化膜，并且包括选自V，Cr，Mn，Fe，Co，Ni，Nb，Mo，Tc，Ru，Rh，Pd，Ta，W中的至少一种元素， Re，Os，Ir和Pt; 以及形成在Ti氧化物膜上的金属膜。

公开(公告)号：US20130076550A1

公开(公告)日：2013-03-28

申请号：US13536085

申请日：2012-06-28

申请人： Takao MARUKAME ,  Tetsufumi Tanamoto ,  Atsuhiro Kinoshita ,  Tomoaki Inokuchi ,  Masamichi Suzuki ,  Yoshiaki Saito

发明人： Takao MARUKAME ,  Tetsufumi Tanamoto ,  Atsuhiro Kinoshita ,  Tomoaki Inokuchi ,  Masamichi Suzuki ,  Yoshiaki Saito

IPC分类号： H03M1/34

CPC分类号： H03M1/1061 ,  H01L27/22 ,  H01L43/08 ,  H03M1/365

摘要： According to an embodiment, an analog-to-digital converter includes a voltage generating unit, and a plurality of comparators. The voltage generating unit is configured to divide a reference voltage by a plurality of variable resistors to generate a plurality of comparative voltages. Each of the plurality of comparator is configured to compare any one of the plurality of comparative voltages with an analog input voltage and output a digital signal based on a result of a comparison between the comparative voltage and the analog input voltage. Each of the plurality of variable resistors includes a plurality of variable resistive elements that are connected in series, and each of the plurality of variable resistive elements has a resistance value that is variably set according to an external signal.

摘要翻译： 根据实施例，模数转换器包括电压产生单元和多个比较器。 电压产生单元被配置为通过多个可变电阻器分压参考电压以产生多个比较电压。 多个比较器中的每一个被配置为将多个比较电压中的任何一个与模拟输入电压进行比较，并且基于比较电压和模拟输入电压之间的比较结果输出数字信号。 多个可变电阻器中的每一个包括串联连接的多个可变电阻元件，并且多个可变电阻元件中的每一个具有根据外部信号可变地设置的电阻值。

公开(公告)号：US20120117354A1

公开(公告)日：2012-05-10

申请号：US13293399

申请日：2011-11-10

申请人： Kosuke Tatsumura ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki ,  Yoshifumi Nishi ,  Takao Marukame ,  Takahiro Kurita

发明人： Kosuke Tatsumura ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki ,  Yoshifumi Nishi ,  Takao Marukame ,  Takahiro Kurita

IPC分类号： G06F12/02

CPC分类号： H04L49/253 ,  G06F3/0605 ,  G06F3/0635 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0683 ,  H04L12/6418 ,  H04L45/74

摘要： According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

摘要翻译： 根据一个实施例，存储设备包括多个存储器节点。 每个存储器节点包括多个输入端口，多个输出端口，选择器，分组控制器和存储器。 选择器将输入到输入端口的数据包输出输出到其中一个输出端口。 分组控制器控制选择器。 内存存储数据。 存储器节点在输入端口和输出端口相互连接。 存储器节点具有由其物理位置确定的地址。 当接收到没有寻址到具有分组控制器的存储器节点的分组时，分组控制器基于包括分组的目的地地址的信息和具有分组控制器的存储器节点的地址来切换输出分组的输出端口 。

公开(公告)号：US20120077341A1

公开(公告)日：2012-03-29

申请号：US13081629

申请日：2011-04-07

申请人： Yoshifumi Nishi ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki

发明人： Yoshifumi Nishi ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki

IPC分类号： H01L21/283

CPC分类号： H01L21/28518 ,  H01L29/1608 ,  H01L29/41708 ,  H01L29/456 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/6609 ,  H01L29/66272 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66712 ,  H01L29/732 ,  H01L29/7833 ,  H01L29/861

摘要： In a semiconductor device manufacturing method according to an exemplary embodiment, a sulfur-containing film containing sulfur is deposited on an n-type semiconductor, a first metal film containing a first metal is deposited on the sulfur-containing film, a heat treatment is performed to form a metal semiconductor compound film by reacting the n-type semiconductor and the sulfur-containing film, and to introduce sulfur to an interface between the n-type semiconductor and the metal semiconductor compound film being formed.

摘要翻译： 在根据示例性实施例的半导体器件制造方法中，在n型半导体上沉积含硫的含硫膜，在含硫膜上沉积含有第一金属的第一金属膜，进行热处理 通过使n型半导体和含硫膜反应形成金属半导体化合物膜，并将硫引入到正在形成的n型半导体和金属半导体化合物膜之间的界面上。

公开(公告)号：US08849219B2

公开(公告)日：2014-09-30

申请号：US13599413

申请日：2012-08-30

申请人： Jun Deguchi ,  Shouhei Kousai ,  Yousuke Hagiwara ,  Masamichi Suzuki ,  Atsuhiro Kinoshita ,  Takao Marukame

发明人： Jun Deguchi ,  Shouhei Kousai ,  Yousuke Hagiwara ,  Masamichi Suzuki ,  Atsuhiro Kinoshita ,  Takao Marukame

IPC分类号： H04B1/38 ,  H03M1/66 ,  H03M1/10 ,  H03M1/74

CPC分类号： H03M1/66 ,  H03M1/1061 ,  H03M1/745

摘要： In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n−1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.

摘要翻译： 通常，根据一个实施例，配置成将包括n（n> 1）位的数字信号转换为模拟电流以从输出端输出模拟电流的DA转换器包括n个电压 - 电流转换器。 它们中的每一个对应于数字信号的每个位，并且被配置为根据相应的位产生电流。 第k（k是0到n-1的整数）电压 - 电流转换器包括阈值电压可调的第一晶体管。 第一晶体管包括半导体衬底，第一扩散区，第二扩散区，绝缘膜，电荷累积膜和栅极。