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公开(公告)号：US09628035B2
公开(公告)日：2017-04-18
申请号：US14513387
申请日：2014-10-14
Applicant: MediaTek Inc.
Inventor： Hung-Chieh Tsai , Chi-Lun Lo , Chen-Yen Ho , Yu-Hsin Lin
CPC classification number: H03F3/45179 , H03F1/14 , H03F1/3211 , H03F1/483 , H03F3/193 , H03F3/3023 , H03F3/45 , H03F3/45076 , H03F3/45188 , H03F2200/36 , H03F2203/45222 , H03F2203/45521 , H03F2203/45526 , H03F2203/45626
Abstract: An implementation of an operational amplifier circuit includes a first stage amplifier circuit, a second stage amplifier circuit and a first feedforward circuit. The first stage amplifier circuit is coupled to a first input node for receiving a first input signal and amplifying the first input signal to generate a first amplified signal. The second stage amplifier circuit is coupled to the first stage amplifier circuit for receiving the first amplified signal and amplifying the first amplified signal to generate a first output signal at a first output node. The first feedforward circuit is coupled between the first input node and the second stage amplifier circuit for feeding the first input signal forward to the second stage amplifier circuit.
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2.发明授权System and method for measuring the DC-transfer characteristic of an analog-to-digital converter 有权用于测量模数转换器的直流传递特性的系统和方法公开(公告)号：US09584146B2
公开(公告)日：2017-02-28
申请号：US14886545
申请日：2015-10-19
Applicant: MediaTek Inc.
Inventor： Frank Op 't Eynde , Nathan Egan , Khurram Muhammad , Tien-Yu Lo , Chi-Lun Lo , Michael A. Ashburn
CPC classification number: H03M1/109 , H03M1/1038 , H03M1/12 , H03M3/50
Abstract: Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.
Abstract translation: 描述了用于测量和补偿模数转换器的直流传递特性的系统和方法。 包括Σ-Δ调制器的测试信号发生器可以向ADC提供校准信号。 来自ADC的输出可以用陷波滤波器滤波，以抑制由Σ-Δ调制器引入的离散频率的量化噪声。 所得到的滤波信号可以与输入的数字信号与测试信号发生器进行比较，以确定ADC的传输特性。
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公开(公告)号：US20160204793A1
公开(公告)日：2016-07-14
申请号：US14842353
申请日：2015-09-01
Applicant: MediaTek Inc.
Inventor： Frank Op 't Eynde , Chi-Lun Lo , Michael A. Ashburn
IPC: H03M3/00
CPC classification number: H03M3/332 , H03F3/505 , H03F2200/331 , H03F2203/5021 , H03F2203/5031 , H03F2203/5033 , H03M1/00 , H03M1/0641 , H03M1/12 , H03M3/458
Abstract: Systems and methods for reducing spurious noise tones in sigma-delta analog-to-digital converters (ADCs) are described. A dither signal may be added to two differential input signals of a pseudo-differential sigma-delta ADC. The dither signal may be generated by a pseudo-random bit sequence generator and applied to two input buffers, which add the dither signal to received differential analog input signals. The dithered signals may be digitized by two independent sigma-delta ADCs and then subtracted to remove the dither signal from an overall digital output signal.
Abstract translation: 描述了用于减小Σ-Δ模数转换器（ADC）中的杂散噪声音调的系统和方法。 可以将抖动信号添加到伪差分Σ-ΔADC的两个差分输入信号。 抖动信号可以由伪随机比特序列发生器产生，并被施加到两个输入缓冲器，其将抖动信号加到接收到的差分模拟输入信号。 抖动信号可以由两个独立的Σ-ΔADC数字化，然后被减去以从整体数字输出信号中去除抖动信号。
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公开(公告)号：US09385745B1
公开(公告)日：2016-07-05
申请号：US14842353
申请日：2015-09-01
Applicant: MediaTek Inc.
Inventor： Frank Op 't Eynde , Chi-Lun Lo , Michael A. Ashburn
CPC classification number: H03M3/332 , H03F3/505 , H03F2200/331 , H03F2203/5021 , H03F2203/5031 , H03F2203/5033 , H03M1/00 , H03M1/0641 , H03M1/12 , H03M3/458
Abstract: Systems and methods for reducing spurious noise tones in sigma-delta analog-to-digital converters (ADCs) are described. A dither signal may be added to two differential input signals of a pseudo-differential sigma-delta ADC. The dither signal may be generated by a pseudo-random bit sequence generator and applied to two input buffers, which add the dither signal to received differential analog input signals. The dithered signals may be digitized by two independent sigma-delta ADCs and then subtracted to remove the dither signal from an overall digital output signal.
Abstract translation: 描述了用于减小Σ-Δ模数转换器（ADC）中的杂散噪声音调的系统和方法。 可以将抖动信号添加到伪差分Σ-ΔADC的两个差分输入信号。 抖动信号可以由伪随机比特序列发生器产生，并被施加到两个输入缓冲器，其将抖动信号加到接收到的差分模拟输入信号。 抖动信号可以由两个独立的Σ-ΔADC数字化，然后被减去以从整体数字输出信号中去除抖动信号。
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公开(公告)号：US09007249B2
公开(公告)日：2015-04-14
申请号：US14134944
申请日：2013-12-19
Applicant: MediaTek Inc.
Inventor： Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
CPC classification number: H03F1/0205 , H03F3/265 , H03F3/30 , H03F3/3023 , H03F3/45071 , H03F3/45179 , H03F3/45183 , H03F3/45475 , H03F2200/18 , H03F2203/30021 , H03F2203/30033 , H03F2203/45022 , H03F2203/45134 , H03F2203/45138 , H03M3/39 , H03M3/50
Abstract: An amplifier includes a front-end gain stage and an AC-coupled push-pull output stage. The AC-coupled push-pull output stage includes a first transistor, having a source, a drain and a gate, wherein the source of the first transistor is coupled to a first voltage level; a second transistor, having a source, a drain and a gate, wherein the source of the second transistor is coupled to a second voltage level, the gate of the second transistor is coupled to the front-end gain stage, and the drain of the second transistor is coupled to the drain of the first transistor to form an output terminal of the amplifier; an AC-coupled capacitor, which is a passive two terminal electrical component coupled between the front-end gain stage and the gate of the first transistor; and a resistance component, coupling the gate of the first transistor to a bias voltage level.
Abstract translation: 放大器包括前端增益级和AC耦合推挽输出级。 AC耦合推挽输出级包括具有源极，漏极和栅极的第一晶体管，其中第一晶体管的源极耦合到第一电压电平; 具有源极，漏极和栅极的第二晶体管，其中所述第二晶体管的源极耦合到第二电压电平，所述第二晶体管的栅极耦合到所述前端增益级，并且所述漏极 第二晶体管耦合到第一晶体管的漏极，以形成放大器的输出端; AC耦合电容器，其是耦合在前端增益级与第一晶体管的栅极之间的无源双端电气元件; 以及电阻分量，将第一晶体管的栅极耦合到偏置电压电平。
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Patent Agency Ranking
公开(公告)号：US09461660B2
公开(公告)日：2016-10-04
申请号：US14938567
申请日：2015-11-11
Applicant: Mediatek Inc.
Inventor： Khurram Muhammad , Chi-Lun Lo , Frank Op 't Eynde , Michael A. Ashburn, Jr. , Tien-Yu Lo
CPC classification number: H03M1/0626 , H03M1/1255 , H03M1/60
Abstract: A method and apparatus for a digitally-corrected analog-to-digital converter (ADC) are disclosed. The apparatus comprises a nonlinearity generator that generates one or more nonlinear characteristics of a time varying input signal and that causes unwanted signal components at frequencies other than a frequency of the time varying input signal, a frequency response modifier coupled to the nonlinearity generator that modifies the unwanted signal components by altering an amplitude of the unwanted signal components, a frequency response compensator coupled to the frequency response modifier, wherein the frequency response compensator compensates for the modification introduced by the frequency response modifier to provide a filtered digital signal, and an inverse nonlinearity generator coupled to the frequency response compensator for receiving the filtered digital signal, wherein the inverse nonlinearity generator compensates for the one or more nonlinear characteristics.
Abstract translation: 公开了一种用于数字校正的模数转换器（ADC）的方法和装置。 该装置包括非线性发生器，其产生时变输入信号的一个或多个非线性特性，并且在不同于时变输入信号的频率的频率下产生不想要的信号分量，耦合到非线性发生器的频率响应修改器， 通过改变不需要的信号分量的幅度的不需要的信号分量，耦合到频率响应修改器的频率响应补偿器，其中频率响应补偿器补偿由频率响应修改器引入的修改以提供经滤波的数字信号，以及反向非线性 耦合到频率响应补偿器的发生器，用于接收经滤波的数字信号，其中逆非线性发生器补偿一个或多个非线性特性。
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7.发明申请SYSTEM AND METHOD FOR MEASURING THE DC-TRANSFER CHARACTERISTIC OF AN ANALOG-TO-DIGITAL CONVERTER 有权用于测量模拟数字转换器的直流转换特性的系统和方法公开(公告)号：US20160211861A1
公开(公告)日：2016-07-21
申请号：US14886545
申请日：2015-10-19
Applicant: MediaTek Inc.
Inventor： Frank Op 't Eynde , Nathan Egan , Khurram Muhammad , Tien-Yu Lo , Chi-Lun Lo , Michael A. Ashburn
IPC: H03M3/00
CPC classification number: H03M1/109 , H03M1/1038 , H03M1/12 , H03M3/50
Abstract: Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.
Abstract translation: 描述了用于测量和补偿模数转换器的直流传递特性的系统和方法。 包括Σ-Δ调制器的测试信号发生器可以向ADC提供校准信号。 来自ADC的输出可以用陷波滤波器滤波，以抑制由Σ-Δ调制器引入的离散频率的量化噪声。 所得到的滤波信号可以与输入的数字信号与测试信号发生器进行比较，以确定ADC的传输特性。
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公开(公告)号：US08810308B2
公开(公告)日：2014-08-19
申请号：US13758028
申请日：2013-02-04
Applicant: MediaTek Inc.
Inventor： Yu-Hsin Lin , Hung-Chieh Tsai , Chi-Lun Lo , Chen-Yen Ho
CPC classification number: H03H11/1204 , H03H11/1252 , H03H11/126
Abstract: A filter is provided. The filter receives an input signal and generates an output signal according to the input signal. The filter includes an input network, a high-pass network, and an operational circuit. The first input network provides a first normal path for the input signal to generate a first normal signal. The first high-pass network provides a first high-pass path for the input signal to generate a first high-pass signal. The operational circuit has first and second input terminals. The polarity of the second input terminal is inverse to that of the first input terminal. The operational circuit receives the first normal signal by the first input terminal and the first high-pass signal by the second input terminal such that a subtraction operation is performed on the first normal signal and the first high-pass filter to accomplish a low-pass filtering operation for generating the output signal.
Abstract translation: 提供了一个过滤器。 滤波器接收输入信号，并根据输入信号产生输出信号。 滤波器包括输入网络，高通网络和操作电路。 第一输入网络为输入信号提供第一正常路径以产生第一正常信号。 第一高通网络为输入信号提供第一高通路径以产生第一高通信号。 该操作电路具有第一和第二输入端。 第二输入端子的极性与第一输入端子的极性相反。 操作电路由第一输入端接收第一正常信号和由第二输入端接收第一高通信号，使得对第一正常信号和第一高通滤波器执行减法运算以完成低通 用于产生输出信号的滤波操作。
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公开(公告)号：US09154083B2
公开(公告)日：2015-10-06
申请号：US14643240
申请日：2015-03-10
Applicant: MediaTek Inc.
Inventor： Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
CPC classification number: H03F1/0205 , H03F3/265 , H03F3/30 , H03F3/3023 , H03F3/45071 , H03F3/45179 , H03F3/45183 , H03F3/45475 , H03F2200/18 , H03F2203/30021 , H03F2203/30033 , H03F2203/45022 , H03F2203/45134 , H03F2203/45138 , H03M3/39 , H03M3/50
Abstract: An amplifier includes a front-end gain stage and an AC-coupled push-pull output stage. The AC-coupled push-pull output stage includes a first transistor, having a source, a drain and a gate, wherein the source of the first transistor is coupled to a first voltage level. The AC-coupled push-pull output stage further includes a second transistor, having a source, a drain and a gate, wherein the source of the second transistor is coupled to a second voltage level, the gate of the second transistor is coupled to the front-end gain stage, and the drain of the second transistor is coupled to the drain of the first transistor to form an output terminal of the amplifier. Further, the AC-coupled push-pull output stage includes an AC-coupled capacitor, which is a passive two terminal electrical component coupled between the front-end gain stage and the gate of the first transistor.
Abstract translation: 放大器包括前端增益级和AC耦合推挽输出级。 AC耦合推挽输出级包括具有源极，漏极和栅极的第一晶体管，其中第一晶体管的源极耦合到第一电压电平。 AC耦合推挽输出级还包括具有源极，漏极和栅极的第二晶体管，其中第二晶体管的源极耦合到第二电压电平，第二晶体管的栅极耦合到 前端增益级，第二晶体管的漏极耦合到第一晶体管的漏极，以形成放大器的输出端。 此外，AC耦合推挽输出级包括AC耦合电容器，其是耦合在前端增益级与第一晶体管的栅极之间的无源双端电气部件。
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公开(公告)号：US08791848B2
公开(公告)日：2014-07-29
申请号：US13760379
申请日：2013-02-06
Applicant: MediaTek Inc.
Inventor： Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
IPC: H03M3/00
Abstract: A sigma-delta modulator is provided for generating a digital output signal. The sigma-delta modulator includes a multi-stage loop filter, a quantizer, and a digital-to-analog converter. The multi-stage loop filter receives an analog input signal and generates an integrated output signal according to the analog input signal. Each stage of the multi-stage loop filter includes a feedback network. The quantizer receives the integrated output signal and quantizes the integrated output signal to generate the digital output signal. The digital-to-analog converter receives the digital output signal and converts the digital output signal to a compensation signal. The digital-to-analog converter provides the compensation signal to a plurality of internal nodes in the feedback network of the last stage of the multi-stage loop filter.
Abstract translation: 提供Σ-Δ调制器用于产生数字输出信号。 Σ-Δ调制器包括多级环路滤波器，量化器和数模转换器。 多级环路滤波器接收模拟输入信号，并根据模拟输入信号产生积分输出信号。 多级环路滤波器的每一级都包括反馈网络。 量化器接收积分输出信号并量化积分输出信号以产生数字输出信号。 数模转换器接收数字输出信号并将数字输出信号转换成补偿信号。 数模转换器向多级环路滤波器的最后级的反馈网络中的多个内部节点提供补偿信号。
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