Memory erase management system
    1.
    发明授权
    Memory erase management system 有权
    内存擦除管理系统

    公开(公告)号:US07443712B2

    公开(公告)日:2008-10-28

    申请号:US11470958

    申请日:2006-09-07

    IPC分类号: G11C11/00

    摘要: A memory erase management system is provided, including providing a resistive change memory cell, coupling a first line to the resistive change memory cell, coupling a line buffer to the first line, providing a charge storage device coupled to the line buffer, and performing a single pulse erase of the resistive change memory cell by discharging a current from the charge storage device through the resistive change memory cell.

    摘要翻译: 提供了一种存储器擦除管理系统,包括提供电阻变化存储单元,将第一行耦合到电阻变化存储单元,将行缓冲器耦合到第一行,提供耦合到行缓冲器的电荷存储装置,以及执行 通过从电荷存储装置通过电阻变化存储单元放电电流来对电阻变化存储单元进行单次脉冲擦除。

    OPTICAL ERASE MEMORY STRUCTURE
    2.
    发明申请
    OPTICAL ERASE MEMORY STRUCTURE 有权
    光学擦除存储器结构

    公开(公告)号:US20090261367A1

    公开(公告)日:2009-10-22

    申请号:US12106180

    申请日:2008-04-18

    IPC分类号: H01L31/0232 H01L21/8229

    CPC分类号: H01L27/156 G11C16/18

    摘要: A method for providing an optical erase memory structure including: forming a metal-insulator-metal memory cell; positioning a light emitting diode adjacent to the metal-insulator-metal memory cell; and emitting a light emission from the light emitting diode for erasing the metal-insulator-metal memory cell.

    摘要翻译: 一种用于提供光学擦除存储器结构的方法,包括:形成金属 - 绝缘体 - 金属存储单元; 将发光二极管邻近金属绝缘体金属存储单元定位; 并且从发光二极管发射光,以擦除金属 - 绝缘体 - 金属存储单元。

    Optical erase memory structure
    3.
    发明授权
    Optical erase memory structure 有权
    光擦除存储器结构

    公开(公告)号:US07781806B2

    公开(公告)日:2010-08-24

    申请号:US12106180

    申请日:2008-04-18

    IPC分类号: H01L27/148

    CPC分类号: H01L27/156 G11C16/18

    摘要: A method for providing an optical erase memory structure including: forming a metal-insulator-metal memory cell; positioning a light emitting diode adjacent to the metal-insulator-metal memory cell; and emitting a light emission from the light emitting diode for erasing the metal-insulator-metal memory cell.

    摘要翻译: 一种用于提供光学擦除存储器结构的方法,包括:形成金属 - 绝缘体 - 金属存储单元; 将发光二极管邻近金属绝缘体金属存储单元定位; 并且从发光二极管发射光,以擦除金属 - 绝缘体 - 金属存储单元。

    MEMORY ERASE MANAGEMENT SYSTEM
    4.
    发明申请
    MEMORY ERASE MANAGEMENT SYSTEM 有权
    内存删除管理系统

    公开(公告)号:US20080062739A1

    公开(公告)日:2008-03-13

    申请号:US11470958

    申请日:2006-09-07

    IPC分类号: G11C7/00 G11C11/00

    摘要: A memory erase management system is provided, including providing a resistive change memory cell, coupling a first line to the resistive change memory cell, coupling a line buffer to the first line, providing a charge storage device coupled to the line buffer, and performing a single pulse erase of the resistive change memory cell by discharging a current from the charge storage device through the resistive change memory cell.

    摘要翻译: 提供了一种存储器擦除管理系统,包括提供电阻变化存储单元,将第一行耦合到电阻变化存储单元,将行缓冲器耦合到第一行,提供耦合到行缓冲器的电荷存储装置,以及执行 通过从电荷存储装置通过电阻变化存储单元放电电流来对电阻变化存储单元进行单次脉冲擦除。

    MEMORY DEVICE AND METHOD
    6.
    发明申请
    MEMORY DEVICE AND METHOD 有权
    存储器件和方法

    公开(公告)号:US20110235430A1

    公开(公告)日:2011-09-29

    申请号:US13154616

    申请日:2011-06-07

    IPC分类号: G11C16/28

    摘要: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.

    摘要翻译: 在第一读取周期的第一部分期间,确定读出放大器的第一输入是在读周期的第一部分期间基于存储单元的状态接收信息,并且确定第一输入处的电导基本相等 在第一部分期间到感测放大器的第二输入处的电导。 多个NAND串模块连接到存储器件的全局位线,该存储器件包括形成多个NAND串和缓冲器的存储器列。

    Non-volatile memory string module with buffer and method
    7.
    发明授权
    Non-volatile memory string module with buffer and method 有权
    具有缓冲区和方法的非易失性存储器字符串模块

    公开(公告)号:US07830716B2

    公开(公告)日:2010-11-09

    申请号:US12134898

    申请日:2008-06-06

    IPC分类号: G11C16/04

    摘要: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.

    摘要翻译: 在第一读取周期的第一部分期间,确定读出放大器的第一输入是在读周期的第一部分期间基于存储单元的状态接收信息,并且确定第一输入处的电导基本相等 在第一部分期间到感测放大器的第二输入处的电导。 多个NAND串模块连接到存储器件的全局位线,该存储器件包括形成多个NAND串和缓冲器的存储器列。

    MULTIPOINT PROCESSING UNIT
    10.
    发明申请
    MULTIPOINT PROCESSING UNIT 有权
    多点加工单元

    公开(公告)号:US20080005246A1

    公开(公告)日:2008-01-03

    申请号:US11838798

    申请日:2007-08-14

    IPC分类号: G06F15/16 G06F3/00

    摘要: A system to provide a multipoint processing terminal and a multicast bridging terminal to provide mixing, switching, and other processing of media streams under the control of H.323 components. Application Programming Interfaces defined for the multipoint processing terminal provide a multipoint control unit with the capability to change the default behavior of the multipoint processing terminal by allowing the multipoint control unit to control the routing audio and video streams in the multipoint processing terminal and control the media formats in a multipoint conference. Multipoint processing acceleration functionality is provided by providing interfaces to allow hardware accelerated implementations of multipoint processing terminals. The multicast bridging terminals enables clients using one type of control signaling and media streaming to join other conferences using different types of control signaling and media streaming by receiving audio or video data from an incoming media stream and performing any processing necessary to transform the media stream from the incoming stream data format to the outgoing stream data format.

    摘要翻译: 一种提供多点处理终端和组播桥接终端的系统,用于在H.323组件的控制下提供媒体流的混合,切换和其他处理。 应用程序编程为多点处理终端定义的接口提供多点控制单元,具有通过允许多点控制单元控制多点处理终端中的路由音频和视频流并控制媒体的能力来改变多点处理终端的默认行为的能力 多点会议中的格式。 通过提供允许多点处理终端的硬件加速实现的接口来提供多点处理加速功能。 组播桥接终端使得客户端能够使用一种类型的控制信令和媒体流来使用不同类型的控制信令和媒体流来连接其他会议,通过从传入的媒体流接收音频或视频数据,并执行将媒体流从 输入流数据格式为输出流数据格式。