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1.发明申请公开(公告)号：US20140184309A1
公开(公告)日：2014-07-03
申请号：US13731184
申请日：2012-12-31
Applicant: NXP B.V.
Inventor： Peter Gerard Steeneken , Arnoud Pieter van der Wel
IPC: H03K17/689
CPC classification number: H03K17/689 , H03K17/102
Abstract: A high voltage electrical switch including: a plurality of series connected semiconductor switches; a plurality of rectifiers wherein each rectifier is connected to a semiconductor switch control input of one of the semiconductor switches; a radio frequency signal generator; and a plurality of galvanic isolators, wherein each galvanic isolator connects the radio frequency signal generator to one of the plurality of rectifiers, wherein the plurality of semiconductor switches are isolated from one another.
Abstract translation: 一种高压电开关，包括：多个串联连接的半导体开关; 多个整流器，其中每个整流器连接到半导体开关之一的半导体开关控制输入端; 射频信号发生器; 以及多个电流隔离器，其中每个电流隔离器将所述射频信号发生器连接到所述多个整流器中的一个，其中所述多个半导体开关彼此隔离。
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公开(公告)号：US09904366B2
公开(公告)日：2018-02-27
申请号：US14459501
申请日：2014-08-14
Applicant: NXP B.V.
Inventor： Casper van der Avoort , Peter Gerard Steeneken
IPC: G06F3/01 , G06F3/044 , G06F3/041 , G06F3/0488
CPC classification number: G06F3/016 , G06F3/0416 , G06F3/044 , G06F3/04886 , G06F2203/04809
Abstract: Consistent with an example embodiment, a user (touch screen) interface has haptic feedback. The user interface comprises, a substrate, a transparent bottom electrode on top of the substrate, a transparent wrinkling layer on top of the transparent bottom electrode, a transparent top electrode on top of the transparent wrinkling layer; and a transparent protective surface on top of the transparent top electrode. The transparent wrinkling layer changes from a smooth surface to a roughened surface upon application of a voltage between the top electrode and the bottom electrode; the voltage generates an electrostatic force mutually attracting the top and bottom electrodes to exert a compressive force upon the transparent wrinkling layer sufficient to generate a degree of surface wrinkling that is perceptible to the touch.
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3.发明申请公开(公告)号：US20160048207A1
公开(公告)日：2016-02-18
申请号：US14459501
申请日：2014-08-14
Applicant: NXP B.V.
Inventor： Casper van der Avoort , Peter Gerard Steeneken
IPC: G06F3/01 , G06F1/16 , G06F3/041 , G06F3/044 , G06F3/0488
CPC classification number: G06F3/016 , G06F3/0416 , G06F3/044 , G06F3/04886 , G06F2203/04809
Abstract: Consistent with an example embodiment, a user (touch screen) interface has haptic feedback. The user interface comprises, a substrate, a transparent bottom electrode on top of the substrate, a transparent wrinkling layer on top of the transparent bottom electrode, a transparent top electrode on top of the transparent wrinkling layer; and a transparent protective surface on top of the transparent top electrode. The transparent wrinkling layer changes from a smooth surface to a roughened surface upon application of a voltage between the top electrode and the bottom electrode; the voltage generates an electrostatic force mutually attracting the top and bottom electrodes to exert a compressive force upon the transparent wrinkling layer sufficient to generate a degree of surface wrinkling that is perceptible to the touch.
Abstract translation: 与示例性实施例一致，用户（触摸屏）界面具有触觉反馈。 用户接口包括：基板，在基板顶部的透明底部电极，透明底部电极顶部的透明起皱层，透明起皱层顶部的透明顶部电极; 和透明顶部电极顶部的透明保护表面。 在顶部电极和底部电极之间施加电压时，透明起皱层从光滑表面变成粗糙表面; 电压产生相互吸引顶部和底部电极的静电力，以对透明起皱层施加足够的压缩力，以产生可触觉的一定程度的表面起皱。
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公开(公告)号：US09177852B2
公开(公告)日：2015-11-03
申请号：US14449522
申请日：2014-08-01
Applicant: NXP B.V.
Inventor： Peter Gerard Steeneken , Roel Daamen , Gerard Koops , Jan Sonsky , Evelyne Gridelet , Coenraad Cornelis Tak
IPC: H01L21/70 , H01L21/762 , H01L21/8238
CPC classification number: H01L21/76232 , H01L21/76224 , H01L21/823878
Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.
Abstract translation: 一种隔离半导体电路，包括：第一子电路和第二子电路; 后端，其包括在所述第一和第二子电路之间的电隔离连接器; 在所述第一和第二子电路的半导体部分之间的横向隔离沟槽，其中所述横向隔离沟槽沿着所述第一和第二子电路的半导体部分的宽度延伸，其中所述隔离沟槽的一端与所述后端 ，并且其中所述隔离沟槽填充有电绝缘材料。
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公开(公告)号：US20150187503A1
公开(公告)日：2015-07-02
申请号：US14657978
申请日：2015-03-13
Applicant: NXP B.V.
Inventor： Peter Gerard Steeneken
CPC classification number: H01G4/385 , H01G4/06 , H01L23/48 , H01L23/642 , H01L25/0655 , H01L28/60 , H01L2224/48137 , H01L2924/00014 , H01P1/04 , H03H7/004 , H04B5/0012 , H01L2224/45099
Abstract: In one or more embodiments, circuitry is provided for isolation and communication of signals between circuits operating in different voltage domains using capacitive coupling. The capacitive coupling is provided by one or more capacitive structures having a breakdown voltage that is defined by way of the various components and their spacing. The capacitive structures each include three capacitive plates arranged to have two plates located in an upper layer and one plate located in a lower layer. A communication signal can be transmitted via the capacitive coupling created between the lower plate and each of the upper plates, respectively.
Abstract translation: 在一个或多个实施例中，电路被提供用于使用电容耦合来在工作在不同电压域的电路之间进行信号的隔离和通信。 电容耦合由具有通过各种部件及其间隔限定的击穿电压的一个或多个电容结构提供。 电容结构各自包括布置成具有位于上层中的两个板和位于下层中的一个板的三个电容板。 可以通过分别在下板和每个上板之间产生的电容耦合来传输通信信号。
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Patent Agency Ranking
公开(公告)号：US20150179735A1
公开(公告)日：2015-06-25
申请号：US14575001
申请日：2014-12-18
Applicant: NXP B.V.
IPC: H01L29/06 , H01L21/762
CPC classification number: H01L29/0649 , H01L21/76224 , H01L21/76283 , H01L21/84 , H01L27/1203 , H01L29/0653 , H01L29/7809 , H01L29/7812 , H01L29/7813
Abstract: The invention relates to a semiconductor device and an associated method for fabricating the semiconductor device. The device comprises: a substrate having a contact surface and a back surface separated by a total distance; a vertical device formed in the substrate and having first and second terminals on the contact surface; an isolation trench extending the total distance through the substrate between the contact surface and the back surface to electrically isolate the vertical device; and a terminal separation trench extending from the contact surface into the substrate and arranged to separate and define an electrical conduction path between the first and second terminals of the vertical device.
Abstract translation: 本发明涉及一种用于制造半导体器件的半导体器件和相关方法。 该装置包括：具有接触面和分离总距离的背面的基板; 垂直装置，其形成在所述基板中，并且在所述接触表面上具有第一和第二端子; 隔离沟槽，其在接触表面和背面之间延伸通过衬底的总距离，以电隔离垂直装置; 以及从所述接触表面延伸到所述衬底中并且被布置成分离并限定所述垂直装置的所述第一和第二端子之间的导电路径的端子分离沟槽。
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公开(公告)号：US08853816B2
公开(公告)日：2014-10-07
申请号：US13705627
申请日：2012-12-05
Applicant: NXP B.V.
Inventor： Peter Gerard Steeneken , Roel Daamen , Gerard Koops , Jan Sonsky , Evelyne Gridelet , Coenraad Cornelis Tak
IPC: H01L21/70 , H01L21/8238 , H01L21/762
CPC classification number: H01L21/76232 , H01L21/76224 , H01L21/823878
Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.
Abstract translation: 一种隔离半导体电路，包括：第一子电路和第二子电路; 后端，其包括在所述第一和第二子电路之间的电隔离连接器; 在所述第一和第二子电路的半导体部分之间的横向隔离沟槽，其中所述横向隔离沟槽沿着所述第一和第二子电路的半导体部分的宽度延伸，其中所述隔离沟槽的一端与所述后端 ，并且其中所述隔离沟槽填充有电绝缘材料。
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公开(公告)号：US09431177B2
公开(公告)日：2016-08-30
申请号：US14657978
申请日：2015-03-13
Applicant: NXP B.V.
Inventor： Peter Gerard Steeneken
IPC: H01G4/38 , H01P1/04 , H01L23/48 , H01L49/02 , H01L23/64 , H04B5/00 , H01G4/06 , H03H7/00 , H01L25/065
CPC classification number: H01G4/385 , H01G4/06 , H01L23/48 , H01L23/642 , H01L25/0655 , H01L28/60 , H01L2224/48137 , H01L2924/00014 , H01P1/04 , H03H7/004 , H04B5/0012 , H01L2224/45099
Abstract: In one or more embodiments, circuitry is provided for isolation and communication of signals between circuits operating in different voltage domains using capacitive coupling. The capacitive coupling is provided by one or more capacitive structures having a breakdown voltage that is defined by way of the various components and their spacing. The capacitive structures each include three capacitive plates arranged to have two plates located in an upper layer and one plate located in a lower layer. A communication signal can be transmitted via the capacitive coupling created between the lower plate and each of the upper plates, respectively.
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公开(公告)号：US09368958B2
公开(公告)日：2016-06-14
申请号：US14045611
申请日：2013-10-03
Applicant: NXP B.V.
Inventor： Alessandro Ferrara , Luc van Dijk , Peter Gerard Steeneken
CPC classification number: H02H5/044 , H02H5/04 , H03K5/08 , H03K17/0822 , H03K17/145 , H03K2017/0806
Abstract: A circuit for protecting a transistor is disclosed. The circuit includes a temperature sensing device coupled to the transistor and a tunable clamping circuit connected between transistor terminals, wherein the tunable clamping circuit is configured to provide an adjustable clamping voltage. A temperature controller coupled to the temperature sensing device and the tunable clamping circuit is also included. The temperature controller is configured to trigger a change in a clamping voltage of the tunable clamping circuit based on a feedback from the temperature sensing device.
Abstract translation: 公开了一种用于保护晶体管的电路。 电路包括耦合到晶体管的温度感测装置和连接在晶体管端子之间的可调谐钳位电路，其中可调谐钳位电路被配置为提供可调整的钳位电压。 还包括耦合到温度感测装置和可调谐钳位电路的温度控制器。 温度控制器被配置为基于来自温度感测装置的反馈来触发可调谐钳位电路的钳位电压的变化。
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10.发明授权公开(公告)号：US08816725B2
公开(公告)日：2014-08-26
申请号：US13731184
申请日：2012-12-31
Applicant: NXP B.V.
Inventor： Peter Gerard Steeneken , Arnoud Pieter van der Wel
IPC: H03B1/00 , H03K3/00 , H03K17/689
CPC classification number: H03K17/689 , H03K17/102
Abstract: A high voltage electrical switch including: a plurality of series connected semiconductor switches; a plurality of rectifiers wherein each rectifier is connected to a semiconductor switch control input of one of the semiconductor switches; a radio frequency signal generator; and a plurality of galvanic isolators, wherein each galvanic isolator connects the radio frequency signal generator to one of the plurality of rectifiers, wherein the plurality of semiconductor switches are isolated from one another.
Abstract translation: 一种高压电开关，包括：多个串联连接的半导体开关; 多个整流器，其中每个整流器连接到半导体开关之一的半导体开关控制输入端; 射频信号发生器; 以及多个电流隔离器，其中每个电流隔离器将所述射频信号发生器连接到所述多个整流器中的一个，其中所述多个半导体开关彼此隔离。
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