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公开(公告)号:US20200335413A1
公开(公告)日:2020-10-22
申请号:US16390659
申请日:2019-04-22
Applicant: Raytheon Company
Inventor: David D. Heston , John G. Heston , Claire E. Mooney , Mikel J. White , Jon Mooney , Tiffany Cassidy
IPC: H01L23/34 , H01L23/498 , H01L23/66
Abstract: An HPA MMIC assembly includes a MMIC device coupled to a thermal spreader. A ground plane is provided on the thermal spreader and coupled to FETs in the MMIC device. The multiple levels of metal separated by multiple dielectric layers provide low-loss broad-band microstrip circuits. The thermal spreader may include diamond, an air/wire-edm spreader or a multi-layer board (MLB) with heat sink vias and ground vias.
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公开(公告)号:US10778176B2
公开(公告)日:2020-09-15
申请号:US16203763
申请日:2018-11-29
Applicant: RAYTHEON COMPANY
Inventor: Richard G. Pierce , Robert S. Isom , Brandon W. Pillans , Mikel White , David D. Heston , John G. Heston
Abstract: Guanella topology balun/unun impedance transformer contains cascaded, i.e., series-coupled, coils of different sizes implemented in RF CMOS technology. The cascading of differently-sized coils provides for a large resonance-free operating bandwidth. The shunt inductive loading maximizes low frequency performance.
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公开(公告)号:US20200177151A1
公开(公告)日:2020-06-04
申请号:US16203763
申请日:2018-11-29
Applicant: RAYTHEON COMPANY
Inventor: Richard G. Pierce , Robert S. Isom , Brandon W. Pillans , Mikel White , David D. Heston , John G. Heston
Abstract: Guanella topology balun/unun impedance transformer contains cascaded, i.e., series-coupled, coils of different sizes implemented in RF CMOS technology. The cascading of differently-sized coils provides for a large resonance-free operating bandwidth. The shunt inductive loading maximizes low frequency performance.
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公开(公告)号:US09520368B1
公开(公告)日:2016-12-13
申请号:US14980602
申请日:2015-12-28
Applicant: Raytheon Company
Inventor: Samuel D. Tonomura , Anthony M. Petrucelli , Cynthia Y. Hang , Chad Patterson , Ethan S. Heinrich , Michael M. Fitzgibbon , John G. Heston
IPC: H01L23/66 , H01L23/00 , H01L23/528 , H01L23/522 , H01L23/498
CPC classification number: H01L23/66 , H01L23/49822 , H01L23/5222 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L2223/6627 , H01L2223/6672 , H01L2223/6683 , H01L2224/13023 , H01L2224/13025 , H01L2224/16227 , H01L2224/16235 , H01L2224/17106 , H01L2224/1712 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/1423 , H01L2924/00012
Abstract: An integrated circuit system having: (A) a semiconductor chip with a signal strip conductor disposed on an upper surface of the chip; an active semiconductor device disposed of the upper surface of the chip electrically connected to the signal strip conductor; and a first ground plane conductor disposed on a bottom surface of the chip disposed under the signal strip conductor; and (B) a support structure having: a second ground plane disposed over, and separated from, the signal strip conductor by a dielectric region between the second ground plane and the signal strip conductor on the chip; a signal contact disposed on the bottom surface of the support structure displaced, electrically insulated, from the second ground plane conductor, and electrically connected to a portion of the signal strip conductor. The signal strip conductor, the first ground plane conductor, and the second ground plane conductor provide a stripline microwave transmission line.
Abstract translation: 一种集成电路系统,具有:(A)具有设置在所述芯片的上表面上的信号条导体的半导体芯片; 设置在所述芯片的上表面的电连接到所述信号带导体的有源半导体器件; 以及设置在设置在所述信号带状导体下方的所述芯片的底面上的第一接地面导体; 和(B)支撑结构,其具有:通过芯片上的第二接地平面和信号带导体之间的电介质区域布置在信号带状导体之上并与之隔离的第二接地面; 信号触点,其布置在所述支撑结构的底表面上,与所述第二接地平面导体电绝缘并且电连接到所述信号带导体的一部分。 信号条导体,第一接地平面导体和第二接地平面导体提供带状线微波传输线。
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公开(公告)号:US20190158110A1
公开(公告)日:2019-05-23
申请号:US15819684
申请日:2017-11-21
Applicant: Raytheon Company
Inventor: Ian S. Robinson , James Toplicar , John G. Heston
IPC: H03M3/00
Abstract: An analog-to-digital conversion system includes two quantizers having a least significant bit arranged in a parallel pair. An input circuit coupled to the quantizers provides an analog input signal to the quantizers. A dither generator coupled to the quantizers provides an analog differential dither signal for perturbing quantization of the analog input signal. A combiner coupled to the quantizers adds respective outputs of the quantizers to obtain a linearized digital representation of the analog input signal.
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公开(公告)号:US10298256B1
公开(公告)日:2019-05-21
申请号:US15819684
申请日:2017-11-21
Applicant: Raytheon Company
Inventor: Ian S. Robinson , James Toplicar , John G. Heston
Abstract: An analog-to-digital conversion system includes two quantizers having a least significant bit arranged in a parallel pair. An input circuit coupled to the quantizers provides an analog input signal to the quantizers. A dither generator coupled to the quantizers provides an analog differential dither signal for perturbing quantization of the analog input signal. A combiner coupled to the quantizers adds respective outputs of the quantizers to obtain a linearized digital representation of the analog input signal.
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公开(公告)号:US10896861B2
公开(公告)日:2021-01-19
申请号:US16390659
申请日:2019-04-22
Applicant: Raytheon Company
Inventor: David D. Heston , John G. Heston , Claire E. Mooney , Mikel J. White , Jon Mooney , Tiffany Cassidy
IPC: H05K1/02 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/46 , H01L23/48 , H01L23/66 , H01L23/367 , H01L23/373 , H01L23/495 , H01L23/498 , H01L23/522 , H01L23/528 , H01L23/535 , H01L23/538 , H01L23/34
Abstract: An HPA MMIC assembly includes a MMIC device coupled to a thermal spreader. A ground plane is provided on the thermal spreader and coupled to FETs in the MMIC device. The multiple levels of metal separated by multiple dielectric layers provide low-loss broad-band microstrip circuits. The thermal spreader may include diamond, an air/wire-edm spreader or a multi-layer board (MLB) with heat sink vias and ground vias.
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公开(公告)号:US10090847B1
公开(公告)日:2018-10-02
申请号:US15819628
申请日:2017-11-21
Applicant: Raytheon Company
Inventor: Ian S. Robinson , James Toplicar , John G. Heston
Abstract: A system and method of converting an analog input signal to a digital output signal includes coupling an analog input signal to a plurality of analog-to-digital converters (ADCs) arranged in a parallel configuration. Pseudo-random discrete valued complementary offset voltage levels that span an input voltage range of the sum of the plurality of ADCs are generated. An amount of continuous, analog dither that randomly varies at values between the discrete offset voltage levels is generated, the analog dither being less than steps between the discrete offset voltage levels. On different clock cycles, different discrete offset voltage levels are coupled to at least some of the ADCs. At each ADC, the respectively coupled analog input, discrete offset voltage level, and continuous analog dither are quantized to obtain a digital output. The respective digital outputs are combined to obtain a linearized digital representation of the analog input signal.
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