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1.发明授权Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays 有权用于晶圆级封装的红外焦平面阵列的抗反射涂层盖晶片中的应力消除方法公开(公告)号：US09427776B2
公开(公告)日：2016-08-30
申请号：US13688714
申请日：2012-11-29
申请人： Raytheon Company
CPC分类号： B81C1/00325 , B05D5/061 , B81B7/0067 , B81B2201/0207 , B81C2203/0118
摘要： Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.
摘要翻译： 提供了通过盖晶片的抗反射涂层引起的减少晶片弓的方法。 该方法可以利用其中具有至少一个开口的荫罩，其位于帽晶片中的相对凹陷区域。 该方法还可以包括将至少一层抗反射涂层材料通过荫罩沉积到盖晶片的平面侧上，以在平面侧上提供不连续的涂层。
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2.发明申请WAFER LEVEL PACKAGED INFRARED (IR) FOCAL PLANE ARRAY (FPA) WITH EVANESCENT WAVE COUPLING 有权WAFER LEVEL包装红外（IR）FOCAL PLANE ARRAY（FPA）与EVANESCENT WAVE COUPLING公开(公告)号：US20150321905A1
公开(公告)日：2015-11-12
申请号：US14270945
申请日：2014-05-06
申请人： Raytheon Company
CPC分类号： B81B7/0067 , B81B7/0035 , B81B2201/0207 , B81C1/00317 , G01J5/045 , G01J5/08 , G01J5/20 , H01L37/00
摘要： A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when. the cover wafer is bonded to the device wafer.
摘要翻译： 一种用于检测具有预定波长的电磁辐射的结构。 该结构包括具有传感元件的器件晶片，其响应于电磁辐射而设置在器件晶片的表面的预定区域上。 提供了覆盖晶片，其具有对电磁辐射透明的区域，以将电磁辐射穿过透明区域传递到感测元件的表面上。 提供了一种键间隔结构，用于当从盖玻片的透明区域的相对表面以小于预定波长的一小部分的距离来支撑感测元件的表面时。 盖晶片被结合到器件晶片。
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公开(公告)号：US20140193948A1
公开(公告)日：2014-07-10
申请号：US14202756
申请日：2014-03-10
申请人： RAYTHEON COMPANY
IPC分类号： B81C1/00
CPC分类号： B81B7/0041 , B81B7/007 , B81C1/00269 , B81C2203/019 , H01L23/053 , H01L24/27 , H01L24/29 , H01L24/83 , H01L2224/27444 , H01L2224/27462 , H01L2224/27464 , H01L2224/29011 , H01L2224/291 , H01L2224/83001 , H01L2224/83007 , H01L2224/83139 , H01L2224/8314 , H01L2224/83141 , H01L2224/83192 , H01L2924/1461 , H01L2924/163 , H01L2924/00014 , H01L2924/014
摘要： A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.
摘要翻译： 一种形成晶片级封装电路器件的方法包括形成器件晶片，器件晶片包括残留在器件晶片的衬底的第一区域中的第一组一个或多个材料层; 以及形成被配置为附接到所述器件晶片的盖晶片，所述盖晶片包括留在所述盖晶片的衬底的第二区域中的第二组一个或多个材料层; 其中一个或多个材料层的所述第一和第二组的组合厚度在所述器件晶片和所述盖晶片接合时限定了整合的接合间隙控制结构。
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公开(公告)号：US20140175590A1
公开(公告)日：2014-06-26
申请号：US13721545
申请日：2012-12-20
申请人： RAYTHEON COMPANY
IPC分类号： H01L31/0203
CPC分类号： H01L31/0203 , B81B7/0038 , G01J5/0285 , G01J5/045 , G01J5/0875 , H01L23/26 , H01L27/14618 , H01L27/14649 , H01L2924/0002 , Y10T29/4998 , Y10T428/24521 , H01L2924/00
摘要： A wafer level vacuum packaged (WLVP) device having a first substrate having an array of detectors and a second substrate bonded to the first substrate having a plurality of protrusions and a plurality of getter material members projecting outwardly from a sidewall of the protrusions members are disposed at oblique angles to the sidewalls and have ends extending into gaps between the protrusions. The device is formed by: forming protrusions into a surface of a substrate; and depositing getter material by physical vapor deposition from an evaporating source of the getter material at an oblique angle to the sidewalls, atoms of the getter material initially forming nucleation sites on the sidewalls with subsequent atoms attaching to the nucleation sites and shadowing area surrounding each nucleation site, the getter material thereby growing into structures towards the evaporating source.
摘要翻译： 晶片级真空封装（WLVP）器件具有具有检测器阵列的第一衬底和与第一衬底接合的第二衬底，其具有多个突起和从突出构件的侧壁向外突出的多个吸气材料构件 与侧壁成倾斜的角度并且具有延伸到突起之间的间隙的端部。 该装置通过以下方式形成：将突起形成在基板的表面中; 并且通过物理气相沉积从吸气材料的蒸发源以与侧壁倾斜的角度沉积吸气剂材料，吸气材料的原子最初在侧壁上形成成核位点，随后的原子附着于成核位置和围绕每个成核的阴影区域 吸气剂材料因此生长成朝向蒸发源的结构。
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公开(公告)号：US10262913B2
公开(公告)日：2019-04-16
申请号：US15942911
申请日：2018-04-02
申请人： RAYTHEON COMPANY
IPC分类号： H01L23/48 , H01L23/10 , H01L23/498 , H01L21/768 , B81B7/00 , H01L23/26 , H01L27/146 , B81C1/00 , H01L21/52
摘要： An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
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公开(公告)号：US20170148695A1
公开(公告)日：2017-05-25
申请号：US15402329
申请日：2017-01-10
申请人： RAYTHEON COMPANY
发明人： Stephen H. Black , Adam M. Kennedy
CPC分类号： H01L23/26 , H01L21/3221 , H01L21/3225 , H01L21/4817 , H01L21/54 , H01L23/041 , H01L23/10
摘要： A surface defined by a wafer level package (WLP) region and an external region, and A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a layer of getter material is disposed on at least a portion of the external region. According to one embodiment, the external region comprises a saw-to-reveal (STR) region of the wafer.
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7.发明授权Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling 有权晶圆级封装红外（IR）焦平面阵列（FPA）与ev逝波耦合公开(公告)号：US09227839B2
公开(公告)日：2016-01-05
申请号：US14270945
申请日：2014-05-06
申请人： Raytheon Company
CPC分类号： B81B7/0067 , B81B7/0035 , B81B2201/0207 , B81C1/00317 , G01J5/045 , G01J5/08 , G01J5/20 , H01L37/00
摘要： A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when the cover wafer is bonded to the device wafer.
摘要翻译： 一种用于检测具有预定波长的电磁辐射的结构。 该结构包括具有传感元件的器件晶片，其响应于电磁辐射而设置在器件晶片的表面的预定区域上。 提供了覆盖晶片，其具有对电磁辐射透明的区域，以将电磁辐射穿过透明区域传递到感测元件的表面上。 提供了一种键间隔结构，用于当覆盖晶片接合到器件晶片时，从盖晶片的透明区域的相对表面支撑感测元件的表面，该距离小于预定波长的一小部分。
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公开(公告)号：US20150249042A1
公开(公告)日：2015-09-03
申请号：US14193437
申请日：2014-02-28
申请人： Raytheon Company
CPC分类号： C23C14/28 , B32B3/10 , B32B15/04 , B32B2255/205 , B32B2457/00 , C23C14/06 , G01J5/045 , H01L23/26 , H01L2924/0002 , Y10T428/24802 , H01L2924/00
摘要： A getter structure and method wherein a layer of seed material is deposited on a predetermined region of a surface of a structure under conditions to form a plurality of nucleation sites on a surface of the structure. The nucleation sites have an average height over the surface area of the predetermined region of less than one molecule thick. Subsequently a getter material is deposited over the surface to form a plurality of getter material members projecting outwardly from the nucleation sites.
摘要翻译： 一种吸气剂结构和方法，其中在结构的表面上形成多个成核位置的条件下，将种子材料层沉积在结构的表面的预定区域上。 成核位置具有小于一分子厚的预定区域的表面积的平均高度。 随后，吸气剂材料沉积在表面上以形成从成核位置向外突出的多个吸气材料构件。
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9.发明申请WAFER LEVEL PACKAGE SOLDER BARRIER USED AS VACUUM GETTER 有权WAVER LEVEL PACKAGE SOLDER BARRIER用作真空灭火器公开(公告)号：US20150014854A1
公开(公告)日：2015-01-15
申请号：US13939400
申请日：2013-07-11
申请人： Raytheon Company
IPC分类号： H01L23/498 , H01L21/768
CPC分类号： H01L23/10 , B81B7/0038 , B81B2201/0207 , B81C1/00269 , B81C2203/035 , H01L21/52 , H01L21/76841 , H01L23/26 , H01L23/49866 , H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/14683 , H01L27/1469 , H01L2224/16 , H01L2924/0002 , H01L2924/00
摘要： An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
摘要翻译： 电子装置及其制造方法。 一种或多种方法可以包括提供具有空腔和围绕空腔的表面的盖晶片和具有检测器装置和参考装置的装置晶片。 在某些实例中，可以将钛材料的阻焊层沉积到盖晶片的表面上。 可以进一步激活钛材料的阻焊层作为吸气剂。 在各种示例中，盖晶片和器件晶片可以使用焊料接合在一起，并且钛材料的阻焊层可以防止焊料接触盖晶片的表面。
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公开(公告)号：US20180226309A1
公开(公告)日：2018-08-09
申请号：US15942911
申请日：2018-04-02
申请人： RAYTHEON COMPANY
IPC分类号： H01L23/10 , H01L21/768 , H01L21/52 , H01L27/146 , H01L23/498 , H01L23/26 , B81B7/00 , B81C1/00
CPC分类号： H01L23/10 , B81B7/0038 , B81B2201/0207 , B81C1/00269 , B81C2203/035 , H01L21/52 , H01L21/76841 , H01L23/26 , H01L23/49866 , H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/14683 , H01L27/1469 , H01L2224/16 , H01L2924/0002 , H01L2924/00
摘要： An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
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