公开(公告)号：US09174836B2

公开(公告)日：2015-11-03

申请号：US14456156

申请日：2014-08-11

Applicant: Raytheon Company

Inventor： Roland Gooch ,  Buu Diep ,  Thomas Allan Kocian ,  Stephen H. Black ,  Adam M. Kennedy

IPC: H01L23/12 ,  B81B7/00 ,  B81C1/00 ,  H01L23/053 ,  H01L23/00

CPC classification number: B81B7/0041 ,  B81B7/007 ,  B81C1/00269 ,  B81C2203/019 ,  H01L23/053 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27444 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/291 ,  H01L2224/83001 ,  H01L2224/83007 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83192 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.

Abstract translation: 一种形成晶片级封装电路器件的方法包括形成器件晶片，器件晶片包括残留在器件晶片的衬底的第一区域中的第一组一个或多个材料层; 以及形成被配置为附接到所述器件晶片的盖晶片，所述盖晶片包括留在所述盖晶片的衬底的第二区域中的第二组一个或多个材料层; 其中一个或多个材料层的所述第一和第二组的组合厚度在所述器件晶片和所述盖晶片接合时限定了整合的接合间隙控制结构。

公开(公告)号：US20150162479A1

公开(公告)日：2015-06-11

申请号：US14100048

申请日：2013-12-09

Applicant: Raytheon Company

Inventor： Roland Gooch ,  Thomas Allan Kocian ,  Buu Diep ,  Adam M. Kennedy ,  Stephen H. Black

IPC: H01L31/18 ,  H01L31/0232

CPC classification number: H01L31/18 ,  B81C1/00373 ,  B81C2201/0188 ,  H01L31/02327

Abstract: A method for forming a coating of material on selected portions of a surface of a substrate having a plurality of cavities, each cavity having outer, peripheral sidewalls extending outwardly from the surface. The method includes: providing a structure having a release agent thereon; contacting top surface of the wafer with the release agent to transfer portions of the release agent to the top surface of the wafer while bottom portions of the cavities remain spaced from the release agent to produce an intermediate structure; the release agent disposed on the top surface of the wafer and with the bottom portions of the cavities void of the release agent; exposing the intermediate structure to the material to blanket coat the material on both the release agent and the bottom portions of the cavities; and selectively removing the release agent together with the coating material while leaving the coating material on the bottom portions of the cavities.

Abstract translation: 一种用于在具有多个空腔的基板的表面的选定部分上形成材料涂层的方法，每个空腔具有从表面向外延伸的外部周边侧壁。 该方法包括：提供其上具有脱模剂的结构; 使所述晶片的顶表面与所述脱模剂接触以将所述脱模剂的部分转移到所述晶片的顶表面，同时所述空腔的底部保持与所述脱模剂间隔开以产生中间结构; 所述脱模剂设置在所述晶片的顶表面上，并且所述空腔的底部部分脱离所述脱模剂; 将所述中间结构暴露于所述材料以在所述空腔的所述脱模剂和所述底部两者上均匀地涂覆所述材料; 并且与涂料一起选择性地除去脱模剂，同时将涂料留在空腔的底部。

公开(公告)号：US20160376146A1

公开(公告)日：2016-12-29

申请号：US14748482

申请日：2015-06-24

Applicant: Raytheon Company

Inventor： Buu Q. Diep ,  Adam M. Kennedy ,  Thomas Allan Kocian ,  Mark Lamb

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81B7/0058 ,  B81B7/0041 ,  B81B2201/0207 ,  B81B2201/04 ,  B81C1/00269 ,  B81C1/00317 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019

Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.

Abstract translation: 微机电系统（MEMS）封装包括在第一对外边缘之间延伸以限定长度的基板和限定宽度的第二对外边缘。 密封环组件设置在基板上，并且包括至少一个密封环，其形成与至少一个MEMS装置相邻的第一边界点和邻近至少一个外边缘的第二边界点。 封装还包括在密封环组件上的窗口盖，以限定包含至少一个MEMS器件的密封间隙。 密封圈组件在第二边界点将窗口盖固定到基底，使得窗口盖进入密封间隙的偏转减小。

公开(公告)号：US09105800B2

公开(公告)日：2015-08-11

申请号：US14100048

申请日：2013-12-09

Applicant: Raytheon Company

Inventor： Roland Gooch ,  Thomas Allan Kocian ,  Buu Diep ,  Adam M. Kennedy ,  Stephen H. Black

IPC: H01L31/18 ,  H01L31/0232

CPC classification number: H01L31/18 ,  B81C1/00373 ,  B81C2201/0188 ,  H01L31/02327

Abstract: A method for forming a coating of material on selected portions of a surface of a substrate having a plurality of cavities, each cavity having outer, peripheral sidewalls extending outwardly from the surface. The method includes: providing a structure having a release agent thereon; contacting top surface of the wafer with the release agent to transfer portions of the release agent to the top surface of the wafer while bottom portions of the cavities remain spaced from the release agent to produce an intermediate structure; the release agent disposed on the top surface of the wafer and with the bottom portions of the cavities void of the release agent; exposing the intermediate structure to the material to blanket coat the material on both the release agent and the bottom portions of the cavities; and selectively removing the release agent together with the coating material while leaving the coating material on the bottom portions of the cavities.

Abstract translation: 一种用于在具有多个空腔的基板的表面的选定部分上形成材料涂层的方法，每个空腔具有从表面向外延伸的外部周边侧壁。 该方法包括：提供其上具有脱模剂的结构; 使所述晶片的顶表面与所述脱模剂接触以将所述脱模剂的部分转移到所述晶片的顶表面，同时所述空腔的底部保持与所述脱模剂间隔开以产生中间结构; 所述脱模剂设置在所述晶片的顶表面上，并且所述空腔的底部部分脱离所述脱模剂; 将所述中间结构暴露于所述材料以在所述空腔的所述脱模剂和所述底部两者上均匀地涂覆所述材料; 并且与涂料一起选择性地除去脱模剂，同时将涂料留在空腔的底部。

公开(公告)号：US20140346643A1

公开(公告)日：2014-11-27

申请号：US14456156

申请日：2014-08-11

Applicant: Raytheon Company

Inventor： Roland Gooch ,  Buu Diep ,  Thomas Allan Kocian ,  Stephen H. Black ,  Adam M. Kennedy

IPC: B81B7/00

CPC classification number: B81B7/0041 ,  B81B7/007 ,  B81C1/00269 ,  B81C2203/019 ,  H01L23/053 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27444 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/291 ,  H01L2224/83001 ,  H01L2224/83007 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83192 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.

公开(公告)号：US20170129775A1

公开(公告)日：2017-05-11

申请号：US15416206

申请日：2017-01-26

Applicant: Raytheon Company

Inventor： Buu Q. Diep ,  Adam M. Kennedy ,  Thomas Allan Kocian ,  Mark Lamb

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0058 ,  B81B7/0041 ,  B81B2201/0207 ,  B81B2201/04 ,  B81C1/00269 ,  B81C1/00317 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019

Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.

公开(公告)号：US20150249042A1

公开(公告)日：2015-09-03

申请号：US14193437

申请日：2014-02-28

Applicant: Raytheon Company

Inventor： Roland Gooch ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas Allan Kocian ,  Buu Diep

IPC: H01L23/26 ,  B32B15/04 ,  B32B3/10

CPC classification number: C23C14/28 ,  B32B3/10 ,  B32B15/04 ,  B32B2255/205 ,  B32B2457/00 ,  C23C14/06 ,  G01J5/045 ,  H01L23/26 ,  H01L2924/0002 ,  Y10T428/24802 ,  H01L2924/00

Abstract: A getter structure and method wherein a layer of seed material is deposited on a predetermined region of a surface of a structure under conditions to form a plurality of nucleation sites on a surface of the structure. The nucleation sites have an average height over the surface area of the predetermined region of less than one molecule thick. Subsequently a getter material is deposited over the surface to form a plurality of getter material members projecting outwardly from the nucleation sites.

Abstract translation: 一种吸气剂结构和方法，其中在结构的表面上形成多个成核位置的条件下，将种子材料层沉积在结构的表面的预定区域上。 成核位置具有小于一分子厚的预定区域的表面积的平均高度。 随后，吸气剂材料沉积在表面上以形成从成核位置向外突出的多个吸气材料构件。

公开(公告)号：US20150014854A1

公开(公告)日：2015-01-15

申请号：US13939400

申请日：2013-07-11

Applicant: Raytheon Company

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas Allan Kocian

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L23/10 ,  B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C2203/035 ,  H01L21/52 ,  H01L21/76841 ,  H01L23/26 ,  H01L23/49866 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

Abstract translation: 电子装置及其制造方法。 一种或多种方法可以包括提供具有空腔和围绕空腔的表面的盖晶片和具有检测器装置和参考装置的装置晶片。 在某些实例中，可以将钛材料的阻焊层沉积到盖晶片的表面上。 可以进一步激活钛材料的阻焊层作为吸气剂。 在各种示例中，盖晶片和器件晶片可以使用焊料接合在一起，并且钛材料的阻焊层可以防止焊料接触盖晶片的表面。

公开(公告)号：US09969610B2

公开(公告)日：2018-05-15

申请号：US15416206

申请日：2017-01-26

Applicant: Raytheon Company

Inventor： Buu Q. Diep ,  Adam M. Kennedy ,  Thomas Allan Kocian ,  Mark Lamb

IPC: H01L31/0203 ,  B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0058 ,  B81B7/0041 ,  B81B2201/0207 ,  B81B2201/04 ,  B81C1/00269 ,  B81C1/00317 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019

Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.

公开(公告)号：US09771258B2

公开(公告)日：2017-09-26

申请号：US14748482

申请日：2015-06-24

Applicant: Raytheon Company

Inventor： Buu Q. Diep ,  Adam M. Kennedy ,  Thomas Allan Kocian ,  Mark Lamb

IPC: H01L23/498 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81B7/0058 ,  B81B7/0041 ,  B81B2201/0207 ,  B81B2201/04 ,  B81C1/00269 ,  B81C1/00317 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019

Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.