公开(公告)号：US11999001B2

公开(公告)日：2024-06-04

申请号：US17545322

申请日：2021-12-08

申请人： Adeia Semiconductor Technologies LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H05K1/11 ,  B23K20/00 ,  B23K20/02 ,  H01L21/50 ,  H01L23/00 ,  H01L23/10 ,  H01L23/48 ,  H01L23/49 ,  H01L23/498 ,  H05K1/14 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H05K13/04 ,  H01L21/48 ,  H01L21/768

CPC分类号： B23K20/023 ,  B23K20/002 ,  H01L21/50 ,  H01L23/10 ,  H01L23/481 ,  H01L23/49 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H05K1/11 ,  H05K1/14 ,  H05K1/144 ,  H05K1/18 ,  H05K3/0094 ,  H05K3/34 ,  H05K13/046 ,  H05K13/0465 ,  H01L21/4853 ,  H01L21/76898 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/27 ,  H01L2224/02372 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05138 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13138 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1319 ,  H01L2224/14131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/16501 ,  H01L2224/16503 ,  H01L2224/16505 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29138 ,  H01L2224/29147 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81075 ,  H01L2224/8112 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/83075 ,  H01L2224/8312 ,  H01L2224/83193 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2924/381 ,  H05K1/111 ,  H05K2201/04 ,  H05K2203/04 ,  H01L2224/8112 ,  H01L2924/00014 ,  H01L2224/1147 ,  H01L2924/00014 ,  H01L2224/05187 ,  H01L2924/04953 ,  H01L2224/0518 ,  H01L2924/01071 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05181 ,  H01L2924/00014 ,  H01L2224/05171 ,  H01L2924/01042 ,  H01L2224/05138 ,  H01L2924/01015 ,  H01L2924/00014 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05164 ,  H01L2924/00014 ,  H01L2224/05187 ,  H01L2924/04941 ,  H01L2224/05155 ,  H01L2924/01015 ,  H01L2224/05157 ,  H01L2924/01015 ,  H01L2224/05166 ,  H01L2924/01074 ,  H01L2224/05155 ,  H01L2924/01074 ,  H01L2224/13105 ,  H01L2924/01047 ,  H01L2224/13109 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2224/13138 ,  H01L2924/01034 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/11464 ,  H01L2924/00014 ,  H01L2224/1145 ,  H01L2924/00014 ,  H01L2224/11452 ,  H01L2924/00014 ,  H01L2224/16501 ,  H01L2924/00012 ,  H01L2224/16505 ,  H01L2924/00012 ,  H01L2224/14131 ,  H01L2924/00014 ,  H01L2224/05026 ,  H01L2924/00012 ,  H01L2224/05571 ,  H01L2924/00012 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13184 ,  H01L2924/00014 ,  H01L2224/73103 ,  H01L2924/00012 ,  H01L2224/73203 ,  H01L2924/00012 ,  H01L2224/27462 ,  H01L2924/00014 ,  H01L2224/27464 ,  H01L2924/00014 ,  H01L2224/2745 ,  H01L2924/00014 ,  H01L2224/27452 ,  H01L2924/00014 ,  H01L2224/29105 ,  H01L2924/01047 ,  H01L2224/29109 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2224/29138 ,  H01L2924/01034 ,  H01L2224/32501 ,  H01L2924/00012 ,  H01L2224/32505 ,  H01L2924/00012 ,  H01L2224/8312 ,  H01L2924/00014 ,  H01L2224/1319 ,  H01L2924/07025 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2224/13018 ,  H01L2924/00012

摘要： A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

公开(公告)号：US09978711B2

公开(公告)日：2018-05-22

申请号：US15378993

申请日：2016-12-14

申请人： Infineon Technologies AG

发明人： Gopalakrishnan Trichy Rengarajan ,  Christian Stahlhut

IPC分类号： H01L23/00 ,  H01L21/48

CPC分类号： H01L24/83 ,  H01L21/4825 ,  H01L21/4853 ,  H01L23/3735 ,  H01L23/488 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/05624 ,  H01L2224/06131 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2747 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29163 ,  H01L2224/29169 ,  H01L2224/29173 ,  H01L2224/29176 ,  H01L2224/29178 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/40137 ,  H01L2224/40177 ,  H01L2224/40195 ,  H01L2224/40245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48137 ,  H01L2224/48177 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48472 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/75301 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83469 ,  H01L2224/83473 ,  H01L2224/83476 ,  H01L2224/83478 ,  H01L2224/83895 ,  H01L2224/85181 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/27 ,  H01L2924/01076 ,  H01L2224/45099 ,  H01L2224/37099 ,  H01L2224/84 ,  H01L2224/32225 ,  H01L2224/48247

摘要： A semiconductor chip includes a semiconductor body having a lower side with a lower chip metallization applied thereto. A first contact metallization layer is produced on the lower chip metallization. A second contact metallization layer is produced on a metal surface of a substrate. The semiconductor chip and the substrate are pressed onto one another for a pressing time so that the first and second contact metallization layers bear directly and extensively on one another. During the pressing time, the first contact metallization layer is kept continuously at temperatures which are lower than the melting temperature of the first contact metallization layer. The second contact metallization layer is kept continuously at temperatures which are lower than the melting temperature of the second contact metallization layer during the pressing time. After the pressing together, the first and second contact metallization layers have a total thickness less than 1000 nm.

公开(公告)号：US20170309590A1

公开(公告)日：2017-10-26

申请号：US15517781

申请日：2015-10-28

申请人： DEXERIALS CORPORATION

发明人： Reiji TSUKAO

IPC分类号： H01L23/00

CPC分类号： H01L24/32 ,  C09J9/02 ,  H01B1/22 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/13644 ,  H01L2224/27001 ,  H01L2224/27003 ,  H01L2224/2711 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29357 ,  H01L2224/29364 ,  H01L2224/2939 ,  H01L2224/294 ,  H01L2224/29444 ,  H01L2224/29455 ,  H01L2224/29499 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83101 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2924/14 ,  H01R4/04 ,  H01L2924/00014 ,  H01L2924/0665

摘要： An anisotropic conductive film whereby electrically conductive particles can be sufficiently captured at each connection terminal while suppressing the occurrence of shorts and conduction reliability can be improved even in cases where connecting finely pitched connection terminals. The anisotropic conductive film has a structure in which electrically conductive particle units in which electrically conductive particles are arranged in a row, or electrically conductive particle units in which electrically conductive particles are arranged in a row and independent electrically conductive particles are disposed in a lattice form in an electrically insulating adhesive layer. The shortest distance La between electrically conductive particles selected from adjacent electrically conductive particle units and the independent electrically conductive particles is not less than 0.5 times the particle diameter of the electrically conductive particles and.

公开(公告)号：US09768089B2

公开(公告)日：2017-09-19

申请号：US15224680

申请日：2016-08-01

申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

发明人： Ranjan Rajoo ,  Kai Chong Chan

IPC分类号： H01L23/10 ,  H01L21/683 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L23/10 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/04042 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/24051 ,  H01L2224/245 ,  H01L2224/2732 ,  H01L2224/2741 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2761 ,  H01L2224/27618 ,  H01L2224/29011 ,  H01L2224/29014 ,  H01L2224/29078 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/3003 ,  H01L2224/30051 ,  H01L2224/3012 ,  H01L2224/30505 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/83065 ,  H01L2224/83075 ,  H01L2224/8309 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8389 ,  H01L2224/83905 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/0231 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/0105 ,  H01L21/304

摘要： A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing a wafer stack with first and second wafers bonded together. The wafers include edge and non-edge regions, and at least one of the first and second wafers includes devices formed in the non-edge region. The first wafer serves as the base wafer while the second wafer serves as the top wafer of the wafer stack, where the base wafer is wider than the top wafer, providing a step edge of the wafer stack. An edge protection seal is formed on the wafer stack, where first and second layers are deposited on the wafer stack including at the top wafer and step edge of the wafer stack. The portion of the first and second layers on the step edge of the wafer stack forms the edge protection seal which protects the devices in the wafer stack in subsequent processing.

公开(公告)号：US09620434B1

公开(公告)日：2017-04-11

申请号：US15062893

申请日：2016-03-07

申请人： Toyota Motor Engineering & Manufacturing North America, Inc.

发明人： Shailesh N. Joshi ,  Masao Noguchi

IPC分类号： H01L21/00 ,  H01L23/48 ,  H05K1/11 ,  H01L23/373 ,  H01L23/367 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L25/50 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/2732 ,  H01L2224/27418 ,  H01L2224/27442 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2908 ,  H01L2224/29083 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29255 ,  H01L2224/29294 ,  H01L2224/29295 ,  H01L2224/29311 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/3201 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32503 ,  H01L2224/83101 ,  H01L2224/83193 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2924/10272 ,  H01L2924/201 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A method of bonding a first substrate to a second substrate includes disposing a first high melting point metal layer onto a first substrate, disposing a first low melting point metal layer onto the first high melting point metal layer, disposing a second high melting point metal layer onto a second substrate, and disposing a second low melting point metal layer onto the second high melting point metal layer. The method further includes applying precursor metal particles onto the first and/or second low melting point metal layers, positioning the first and second low melting point metal layers such that the precursor metal particles contact both the first and second low melting point metal layers, and bonding the first substrate to the second substrate by heating the precursor metal particles and each metal layer to form an intermetallic alloy bonding layer between the first and second substrates.

公开(公告)号：US09613926B2

公开(公告)日：2017-04-04

申请号：US14712729

申请日：2015-05-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Ming-Fa Chen ,  Wen-Ching Tsai

IPC分类号： H01L23/00 ,  B81C3/00 ,  H01L23/10 ,  H01L21/50

CPC分类号： H01L24/81 ,  B81C1/00238 ,  B81C3/001 ,  B81C2203/031 ,  B81C2203/035 ,  H01L21/50 ,  H01L23/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03602 ,  H01L2224/03614 ,  H01L2224/03616 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05149 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/06051 ,  H01L2224/08225 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/119 ,  H01L2224/11912 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13149 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/16014 ,  H01L2224/16147 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2747 ,  H01L2224/27614 ,  H01L2224/279 ,  H01L2224/27912 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29149 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/32014 ,  H01L2224/32147 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/80805 ,  H01L2224/80893 ,  H01L2224/80894 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/83805 ,  H01L2224/83815 ,  H01L2224/8383 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/10158 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2224/0347 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/114 ,  H01L2224/1146 ,  H01L2224/1161 ,  H01L2224/274 ,  H01L2224/2746 ,  H01L2224/2761 ,  H01L21/302 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L2224/80

摘要： Bonded structures and method of forming the same are provided. A conductive layer is formed on a first surface of a bonded structure, the bonded structure including a first substrate bonded to a second substrate, the first surface of the bonded structure being an exposed surface of the first substrate. A patterned mask having first openings and second openings is formed on the conductive layer, the first openings and the second openings exposing portions of the conductive layer. First portions of first bonding connectors are formed in the first openings and first portions of second bonding connectors are formed in the second openings. The conductive layer is patterned to form second portions of the first bonding connectors and second portions of the second bonding connectors. The bonded structure is bonded to a third substrate using the first bonding connectors and the second bonding connectors.

公开(公告)号：US20160027759A1

公开(公告)日：2016-01-28

申请号：US14773970

申请日：2014-03-24

申请人： OSRAM OPTO SEMICONDUCTORS GMBH

发明人： Andreas Plößl

IPC分类号： H01L23/00 ,  H01L21/288 ,  H01L21/768 ,  H01L21/285

CPC分类号： H01L24/83 ,  H01L21/2855 ,  H01L21/2885 ,  H01L21/76874 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/27444 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/29109 ,  H01L2224/29113 ,  H01L2224/29139 ,  H01L2224/29166 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32505 ,  H01L2224/83054 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83359 ,  H01L2224/83539 ,  H01L2224/83825 ,  H01L2224/83902 ,  H01L2224/83948 ,  H01L2924/12041 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2924/01322 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method is provided for connecting parts to be joined. A first layer sequence is applied to a first part to be joined. The first layer sequence contains silver. A second layer sequence is applied to a second part to be joined. The second layer sequence contains indium and bismuth. The first layer sequence and the second layer sequence are pressed together at their end faces respectively remote from the first part to be joined and the second part to be joined through application of a joining pressure at a joining temperature which amounts to at most 120° C. for a predetermined joining time. The first layer sequence and the second layer sequence fuse together to form a bonding layer which directly adjoins the first part to be joined and the second part to be joined and the melting temperature of which amounts to at least 260° C.

摘要翻译： 提供了用于连接要连接的部件的方法。 将第一层序列应用于要接合的第一部分。 第一层序列包含银。 将第二层序列应用于待连接的第二部分。 第二层序列包含铟和铋。 第一层序列和第二层序列在其端面处被压在一起，分别远离待接合的第一部分和待连接的第二部分，通过在接合温度下施加接合压力达到至多120℃ 预定的接合时间。 第一层序列和第二层序列熔合在一起形成直接毗邻待接合的第一部分和待接合的第二部分的接合层，其熔融温度等于至少260℃。

公开(公告)号：US09187312B2

公开(公告)日：2015-11-17

申请号：US14202756

申请日：2014-03-10

申请人： Raytheon Company

发明人： Roland Gooch ,  Buu Diep ,  Thomas Allan Kocian ,  Stephen H. Black ,  Adam M. Kennedy

IPC分类号： H01L21/30 ,  B81B7/00 ,  B81C1/00 ,  H01L23/053 ,  H01L23/00

CPC分类号： B81B7/0041 ,  B81B7/007 ,  B81C1/00269 ,  B81C2203/019 ,  H01L23/053 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27444 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/291 ,  H01L2224/83001 ,  H01L2224/83007 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83192 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/014

摘要： A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.

公开(公告)号：US20140153210A1

公开(公告)日：2014-06-05

申请号：US13692148

申请日：2012-12-03

申请人： INVENSAS CORPORATION

发明人： Cyprian Emeka Uzoh

IPC分类号： H05K1/14 ,  H05K13/04

CPC分类号： H05K13/046 ,  H01L21/4853 ,  H01L21/50 ,  H01L21/76898 ,  H01L23/10 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H01L2224/02372 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05138 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13138 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1319 ,  H01L2224/14131 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/16501 ,  H01L2224/16505 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29138 ,  H01L2224/29147 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81075 ,  H01L2224/8112 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/83075 ,  H01L2224/8312 ,  H01L2224/83193 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2924/381 ,  H01L2924/04953 ,  H01L2924/01071 ,  H01L2924/01042 ,  H01L2924/01015 ,  H01L2924/04941 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/01031 ,  H01L2924/01034 ,  H01L2924/00012 ,  H01L2924/07025 ,  H01L2224/05552

摘要： A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

摘要翻译： 微电子组件包括具有表面和第一导电元件的第一基板和具有表面和第二导电元件的第二基板。 组件还包括连接到第一和第二导电元件的导电合金块。 合金质量的第一和第二材料的熔点低于合金的熔点。 第一材料的浓度在朝向第一导电元件设置的位置处的相对较高的量的浓度变化到朝向第二导电元件的相对较低的量，并且第二材料的浓度在浓度上从相对较高的量在 朝向第二导电元件朝向第一导电元件朝向相对较小的量设置的位置。

公开(公告)号：US08736045B1

公开(公告)日：2014-05-27

申请号：US13667458

申请日：2012-11-02

申请人： Raytheon Company

发明人： Roland Gooch ,  Buu Diep ,  Thomas Allan Kocian ,  Stephen H. Black ,  Allan M. Kennedy

IPC分类号： H01L23/12

CPC分类号： B81B7/0041 ,  B81B7/007 ,  B81C1/00269 ,  B81C2203/019 ,  H01L23/053 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27444 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/291 ,  H01L2224/83001 ,  H01L2224/83007 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83192 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/014

摘要： A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.

摘要翻译： 一种形成晶片级封装电路器件的方法包括形成器件晶片，器件晶片包括残留在器件晶片的衬底的第一区域中的第一组一个或多个材料层; 以及形成被配置为附接到所述器件晶片的盖晶片，所述盖晶片包括留在所述盖晶片的衬底的第二区域中的第二组一个或多个材料层; 其中一个或多个材料层的所述第一和第二组的组合厚度在所述器件晶片和所述盖晶片接合时限定了整合的接合间隙控制结构。