公开(公告)号：US11075232B2

公开(公告)日：2021-07-27

申请号：US16522182

申请日：2019-07-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Yoshiharu Hirakata ,  Takashi Hamada ,  Kohei Yokoyama ,  Yasuhiro Jinbo ,  Tetsuji Ishitani ,  Daisuke Kubota

IPC: H01L27/12 ,  H01L51/52 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1339 ,  H01L29/786 ,  H01L27/32 ,  H01L51/00

Abstract: A display device in which a peripheral circuit portion has high operation stability is provided. The display device includes a first substrate and a second substrate. A first insulating layer is provided over a first surface of the first substrate. A second insulating layer is provided over a first surface of the second substrate. The first surface of the first substrate and the first surface of the second substrate face each other. An adhesive layer is provided between the first insulating layer and the second insulating layer. A protective film in contact with the first substrate, the first insulating layer, the adhesive layer, the second insulating layer, and the second substrate is formed in the vicinity of a peripheral portion of the first substrate and the second substrate.

公开(公告)号：US09691905B2

公开(公告)日：2017-06-27

申请号：US15182812

申请日：2016-06-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Daisuke Matsubayashi ,  Masaharu Nagai ,  Yoshiaki Yamamoto ,  Takashi Hamada ,  Yutaka Okazaki ,  Shinya Sasagawa ,  Motomu Kurata ,  Naoto Yamade

IPC: H01L21/00 ,  H01L21/16 ,  H01L29/786 ,  H01L29/66 ,  H01L21/425 ,  H01L21/46 ,  H01L27/12

CPC classification number: H01L29/78693 ,  H01L21/425 ,  H01L21/46 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7782 ,  H01L29/7854 ,  H01L29/7855 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

公开(公告)号：US08890127B2

公开(公告)日：2014-11-18

申请号：US13664864

申请日：2012-10-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yoshiharu Hirakata ,  Takashi Hamada

IPC: H01L35/24

CPC classification number: H01L27/3253 ,  H01L27/322 ,  H01L27/3246 ,  H01L51/5218 ,  H01L51/5228 ,  H01L51/5234 ,  H01L51/525 ,  H01L2251/5315 ,  H01L2251/5392

Abstract: Provided is a light-emitting module from which light with uniform brightness can be extracted. Further, provided is a beautiful light-emitting module in which Newton's rings are not observed. The light-emitting module includes a first substrate, a light-emitting element formed on one surface side of the first substrate, a second substrate, a conductive spacer maintaining the gap between the first substrate and the second substrate, and a space in which the light-emitting element is sealed between the first substrate and the second substrate. Further, the pressure in the space is lower than or equal to the atmospheric pressure. Furthermore, the conductive spacer is electrically connected to the second electrode in a position overlapping with a partition provided over the first substrate so as to reduce a voltage drop occurring in the second electrode.

Abstract translation: 提供了可以从其中提取具有均匀亮度的光的发光模块。 此外，提供了一种美观的发光模块，其中没有观察到牛顿环。 发光模块包括第一基板，形成在第一基板的一个表面侧上的发光元件，第二基板，保持第一基板和第二基板之间的间隙的导电间隔件，以及空间， 发光元件被密封在第一基板和第二基板之间。 此外，空间中的压力低于或等于大气压。 此外，导电间隔物与第二电极电连接在与设置在第一基板上的隔板重叠的位置，以减少在第二电极中发生的电压降。

公开(公告)号：US12153298B2

公开(公告)日：2024-11-26

申请号：US18137648

申请日：2023-04-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yoshiharu Hirakata ,  Tetsuji Ishitani ,  Daisuke Kubota ,  Ryo Hatsumi ,  Masaru Nakano ,  Takashi Hamada

IPC: G02F1/1333 ,  G02F1/1335 ,  G02F1/1362

Abstract: A display device including a peripheral circuit portion with high operation stability. The display device includes a first substrate and a second substrate. A first insulating layer is on a first plane of the first substrate, and a second insulating layer is on a first plane of the second substrate. An area of the first plane of the first substrate is the same as an area of the first plane of the second substrate. The first plane of the first substrate and the first plane of the second substrate face each other. A bonding layer is between the first insulating layer and the second insulating layer. A protection film is in contact with the first substrate, the first insulating layer, the bonding layer, the second insulating layer, and the second substrate.

公开(公告)号：US11824068B2

公开(公告)日：2023-11-21

申请号：US17246788

申请日：2021-05-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Yoshiharu Hirakata ,  Takashi Hamada ,  Kohei Yokoyama ,  Yasuhiro Jinbo ,  Tetsuji Ishitani ,  Daisuke Kubota

IPC: H01L27/12 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1339 ,  H01L29/786 ,  H10K50/842 ,  H10K50/844 ,  H10K59/38 ,  H10K59/40 ,  H10K71/50 ,  H10K102/00

CPC classification number: H01L27/1262 ,  G02F1/1339 ,  G02F1/1368 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/136213 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/78648 ,  H10K50/8426 ,  H10K50/8428 ,  H10K50/844 ,  H10K59/38 ,  H10K59/40 ,  H10K71/50 ,  H10K2102/00

Abstract: A display device in which a peripheral circuit portion has high operation stability is provided. The display device includes a first substrate and a second substrate. A first insulating layer is provided over a first surface of the first substrate. A second insulating layer is provided over a first surface of the second substrate. The first surface of the first substrate and the first surface of the second substrate face each other. An adhesive layer is provided between the first insulating layer and the second insulating layer. A protective film in contact with the first substrate, the first insulating layer, the adhesive layer, the second insulating layer, and the second substrate is formed in the vicinity of a peripheral portion of the first substrate and the second substrate.

公开(公告)号：US11217703B2

公开(公告)日：2022-01-04

申请号：US16905120

申请日：2020-06-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Satoshi Toriumi ,  Takashi Hamada ,  Tetsunori Maruyama ,  Yuki Imoto ,  Yuji Asano ,  Ryunosuke Honda ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/51 ,  H01L29/49 ,  H01L29/417 ,  H01L27/12 ,  H01L27/146 ,  H01L27/1156 ,  H01L27/06 ,  H01L29/423 ,  H01L21/822

Abstract: A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.

公开(公告)号：US10693013B2

公开(公告)日：2020-06-23

申请号：US15091009

申请日：2016-04-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Satoshi Toriumi ,  Takashi Hamada ,  Tetsunori Maruyama ,  Yuki Imoto ,  Yuji Asano ,  Ryunosuke Honda ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/51 ,  H01L29/49 ,  H01L29/417 ,  H01L27/12 ,  H01L27/146 ,  H01L27/1156 ,  H01L27/06 ,  H01L29/423 ,  H01L21/822

Abstract: A minute transistor with low parasitic capacitance, high frequency characteristics, favorable electrical characteristics, stable electrical characteristics, and low off-state current is provided. A semiconductor device includes a semiconductor over a substrate, a source and a drain over the semiconductor, a first insulator over the source and the drain, a second insulator over the semiconductor, a third insulator in contact with a side surface of the first insulator and over the second insulator, and a gate over the third insulator. The semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping with the gate. The length between a top surface of the third region of the semiconductor and a bottom surface of the gate is longer than the length between the first region and the third region.

公开(公告)号：US09368636B2

公开(公告)日：2016-06-14

申请号：US14227459

申请日：2014-03-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu Kurata ,  Shinya Sasagawa ,  Taiga Muraoka ,  Hiroaki Honda ,  Takashi Hamada

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/7869 ,  H01L21/02334 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78696

Abstract: A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.

Abstract translation: 准备具有绝缘表面的基板; 在基板上形成包括第一氧化物半导体层和第二氧化物半导体层的层叠膜; 在层叠膜的一部分上形成掩模层，然后进行干法蚀刻处理，从而除去保留有掩模层的区域，在其余的侧面形成反应产物 叠片 去除掩模层后，通过湿蚀刻处理去除反应产物; 源极电极和漏电极形成在堆叠膜上; 并且第三氧化物半导体层，栅极绝缘膜和栅极电极按顺序层叠并形成在堆叠膜上，以及源电极和漏电极。

公开(公告)号：US20130157392A1

公开(公告)日：2013-06-20

申请号：US13744995

申请日：2013-01-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Takashi Hamada ,  Satoshi Seo

IPC: H01L33/00

CPC classification number: H01L33/005 ,  H01L27/3211 ,  H01L51/0005 ,  H01L51/0021 ,  H01L51/56 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a light emitting device is provided which requires low cost, is easy, and has high throughput. The method of manufacturing a light emitting device is characterized in that: a solution containing a light emitting material is ejected to an anode or cathode under reduced pressure; a solvent in the solution is volatilized until the solution reaches the anode or cathode; and the remaining light emitting material is deposited on the anode or cathode to form a light emitting layer. A burning step for reduction in film thickness is not required after the solution application. Therefore, the manufacturing method, which requires low cost and is easy but which has high throughput, can be provided.

Abstract translation: 提供一种制造发光器件的方法，其需要低成本，容易并且具有高生产量。 制造发光器件的方法的特征在于：将含有发光材料的溶液在减压下喷射到阳极或阴极; 溶液中的溶剂挥发，直到溶液到达阳极或阴极; 并且剩余的发光材料沉积在阳极或阴极上以形成发光层。 在施加溶液后，不需要用于降低膜厚度的燃烧步骤。 因此，可以提供需要低成本且容易但具有高生产量的制造方法。

公开(公告)号：US11635648B2

公开(公告)日：2023-04-25

申请号：US17848628

申请日：2022-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yoshiharu Hirakata ,  Tetsuji Ishitani ,  Daisuke Kubota ,  Ryo Hatsumi ,  Masaru Nakano ,  Takashi Hamada

IPC: G02F1/1333

Abstract: A display device including a peripheral circuit portion with high operation stability. The display device includes a first substrate and a second substrate. A first insulating layer is on a first plane of the first substrate, and a second insulating layer is on a first plane of the second substrate. An area of the first plane of the first substrate is the same as an area of the first plane of the second substrate. The first plane of the first substrate and the first plane of the second substrate face each other. A bonding layer is between the first insulating layer and the second insulating layer. A protection film is in contact with the first substrate, the first insulating layer, the bonding layer, the second insulating layer, and the second substrate.