公开(公告)号：US09412456B2

公开(公告)日：2016-08-09

申请号：US14523850

申请日：2014-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： DongHun Kwak ,  Sang-Won Park ,  Won-Taeck Jung

IPC: G11C16/04 ,  G11C16/10 ,  G11C16/34 ,  H01L27/115 ,  G11C16/08 ,  G11C16/26

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  G11C16/3459 ,  H01L27/1157 ,  H01L27/11582

Abstract: Disclosed are a program method and a nonvolatile memory device. The method includes receiving program data to be programmed in memory cells; reading the memory cells to judge an erase state and at least one program state; performing a state read operation in which the at least one program state is read using a plurality of state read voltages; and programming the program data in the memory cells using a plurality of verification voltages having different levels according to a result of the state read operation. Also disclosed are methods using a plurality of verification voltages selected based on factors which may affect a threshold voltage shift or other characteristic representing the data of a memory cell after programming.

Abstract translation: 公开了一种程序方法和非易失性存储装置。 该方法包括接收要在存储器单元中编程的程序数据; 读取存储单元以判断擦除状态和至少一个程序状态; 执行使用多个状态读取电压读取所述至少一个程序状态的状态读取操作; 以及根据状态读取操作的结果，使用具有不同电平的多个验证电压对存储器单元中的程序数据进行编程。 还公开了使用基于可能影响阈值电压偏移的因素而选择的多个验证电压的方法或者在编程之后表示存储器单元的数据的其他特性的方法。

公开(公告)号：US09224462B2

公开(公告)日：2015-12-29

申请号：US13733384

申请日：2013-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DongHun Kwak ,  Cheon-An Lee

IPC: G11C11/00 ,  G11C11/34 ,  G11C13/00

CPC classification number: G11C13/0023 ,  G11C13/0097 ,  G11C2213/71 ,  G11C2213/77

Abstract: A resistive memory device that simultaneously erases memory cells connected to selected word line(s) included in an erase unit. The erase unit includes fewer word lines than are included in a memory block of the resistive memory device. However, erase verification may nonetheless be performed on a block basis.

Abstract translation: 一种电阻式存储器件，其同时擦除与擦除单元中包括的选定字线相连的存储单元。 擦除单元包括比包括在电阻式存储器件的存储器块中的字线少的字线。 然而，擦除验证可以以块为基础执行。

公开(公告)号：US20130229855A1

公开(公告)日：2013-09-05

申请号：US13733384

申请日：2013-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DongHun Kwak ,  Cheon-An Lee

IPC: G11C13/00

CPC classification number: G11C13/0023 ,  G11C13/0097 ,  G11C2213/71 ,  G11C2213/77

Abstract: Disclosed is a resistive memory device that simultaneously erases memory cells connected to selected word line(s) included in an erase unit. The erase unit includes fewer word lines than are included in a memory block of the resistive memory device. However, erase verification may nonetheless be performed on a block basis.

Abstract translation: 公开了一种同时擦除连接到包括在擦除单元中的选定字线的存储单元的电阻式存储器件。 擦除单元包括比包括在电阻式存储器件的存储器块中的字线少的字线。 然而，擦除验证可以以块为基础执行。

公开(公告)号：US09460795B2

公开(公告)日：2016-10-04

申请号：US14792678

申请日：2015-07-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DongHun Kwak

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/26 ,  H01L27/115

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/26 ,  H01L27/11582

Abstract: An operating method of a nonvolatile memory device including a plurality of strings each string including at least two pillars penetrating wordlines disposed at different layers. The operating method includes applying unselected wordline voltages to unselected wordlines, and applying a selected wordline voltage to a selected wordline, and the unselected wordline voltage applied to the same layer as a layer of the selected wordline is different from the unselected wordline voltage applied to a different layer than the layer of the selected wordline.

Abstract translation: 一种非易失性存储装置的操作方法，包括多个串，每个串包括穿过设置在不同层的字线的至少两个支柱。 操作方法包括将未选择的字线电压施加到未选择的字线，以及将所选择的字线电压施加到所选择的字线，并且施加到与所选字线的层相同的层的未选择的字线电压与施加到所选择的字线的未选择的字线电压不同 不同于所选字母层的层。

公开(公告)号：US09824761B2

公开(公告)日：2017-11-21

申请号：US15138302

申请日：2016-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DongHun Kwak ,  Dongkyo Shim ,  Kitae Park ,  Hyun-Wook Park

IPC: G11C11/34 ,  G11C16/10 ,  G11C11/56 ,  G11C16/04 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3459 ,  G11C16/349 ,  G11C16/3495

Abstract: A programming method of a nonvolatile memory device including; programming data in memory cells connected to a word line by performing a coarse program operation; and programming the data in the memory cells by performing a fine program operation, wherein the number of program states in the coarse program operation is changed according to a program/erase (P/E) cycle number.

公开(公告)号：US09564234B2

公开(公告)日：2017-02-07

申请号：US14186474

申请日：2014-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： DongHun Kwak ,  Kitae Park ,  JinMan Han

IPC: G11C16/00 ,  G11C16/26 ,  G11C16/04 ,  G11C16/24

CPC classification number: G11C16/26 ,  G11C16/0483 ,  G11C16/24

Abstract: Systems and methods of sequentially accessing memory cells in a nonvolatile memory device (NVM) are provided. The NVM has a plurality of strings and a common signal line coupled to the plurality of strings. Each string includes a plurality of memory cells and a selection transistor coupled between the plurality of memory cells and the common signal line. A command that accesses multiple memory cells is received, a voltage is applied to a first selection transistor of a first string to electrically connect the common signal line to the first string, a pulse is applied for a predetermined time period to selection transistors of other strings, and memory cells of the first string are accessed. Advantages such as removal of boosting charges from unselected strings prior to sequentially accessing memory cells from selected strings can improve performance and reliability of NVM-based systems.

Abstract translation: 提供了在非易失性存储器件（NVM）中顺序访问存储器单元的系统和方法。 NVM具有耦合到多个串的多个串和公共信号线。 每个串包括耦合在多个存储单元和公共信号线之间的多个存储单元和选择晶体管。 接收访问多个存储单元的命令，将电压施加到第一串的第一选择晶体管，以将公共信号线电连接到第一串，将脉冲施加预定时间段以选择其他串的晶体管 ，并且访问第一串的存储单元。 在从所选字符串顺序访问存储器单元之前，诸如从未选择的串去除升压电荷的优点可以提高基于NVM的系统的性能和可靠性。

公开(公告)号：US09401214B2

公开(公告)日：2016-07-26

申请号：US14592459

申请日：2015-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DongHun Kwak

IPC: G11C16/04 ,  G11C16/14 ,  G11C16/08 ,  G11C16/34 ,  G11C7/14 ,  G11C7/22 ,  G11C16/16 ,  G11C16/26 ,  H01L27/115 ,  G11C16/10

CPC classification number: G11C16/14 ,  G11C7/14 ,  G11C7/227 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3427 ,  G11C16/3445 ,  G11C16/349 ,  H01L27/115 ,  H01L27/11582

Abstract: A storage device is provided. The storage device includes a memory controller and at least one nonvolatile memory device including memory blocks having a pipe-shaped bit cost scalable (PBiCS) structure. Each of the memory blocks penetrates word lines stacked on a substrate in the form of plates and includes a first pillar, a second pillar, and a back-gate. The second pillar includes a semiconductor layer, an insulating layer, and a charge storage layer. The back-gate includes a pillar connection portion to connect the first and second pillars to each other and is disposed between the substrate and the word lines. The memory controller includes an adjacent cell management unit configured to control the at least one nonvolatile memory device such that a program operation, an erase operation or a read operation is performed on memory cells adjacent to the back-gate, unlike the other memory cells.

Abstract translation: 提供存储设备。 存储装置包括存储器控制器和包括具有管状位成本可缩放（PBiCS）结构的存储器块的至少一个非易失性存储器件。 每个存储块以板的形式渗透堆叠在基板上的字线，并且包括第一柱，第二柱和后栅。 第二柱包括半导体层，绝缘层和电荷存储层。 背栅极包括将第一和第二柱彼此连接并设置在基板和字线之间的柱连接部分。 存储器控制器包括相邻的单元管理单元，其被配置为控制至少一个非易失性存储器件，使得与其他存储单元不同，对与后门相邻的存储器单元执行编程操作，擦除操作或读取操作。

公开(公告)号：US09336866B2

公开(公告)日：2016-05-10

申请号：US14188889

申请日：2014-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DongHun Kwak ,  Dongkyo Shim ,  Kitae Park ,  Hyun-Wook Park

IPC: G11C11/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3459 ,  G11C16/349 ,  G11C16/3495

Abstract: A write method of a storage device includes determining whether to perform a coarse program operation based on information about memory cells of a memory device, in response to a determination that the coarse program operation is to be performed, programming data in the memory device by performing the coarse program operation and a fine program operation, and in response to a determination that the coarse program operation is not to be performed, programming data in the memory device by performing the fine program operation.

Abstract translation: 存储装置的写入方法包括响应于要执行粗略编程操作的确定，基于关于存储器件的存储器单元的信息来确定是否执行粗略编程操作，通过执行存储器件中的程序数据 粗程序操作和精细程序操作，并且响应于不执行粗程序操作的确定，通过执行精细程序操作来在存储器件中编程数据。