Abstract:
A switching device includes a semiconductor layer, a graphene layer, a gate insulation layer, and a gate formed in a three-dimensional stacking structure between a first electrode and a second electrode formed on a substrate.
Abstract:
A graphene device including separated junction contacts and a method of manufacturing the same are disclosed. The graphene device is a field effect transistor (FET) in which graphene is used as a channel. A source electrode and a drain electrode do not directly contact the graphene channel, and junction contacts formed by doping semiconductor are separately disposed between the graphene channel and the source electrode and between the graphene channel and the drain electrode. Therefore, in an off state where a voltage is not applied to a gate electrode, due to a barrier between the graphene channel and the junction contacts, carriers may not move. As a result, the graphene device may have low current in the off state.
Abstract:
A graphene device and an electronic apparatus including the same are provided. According to example embodiments, the graphene device includes a transistor including a source, a gate, and a drain, an active layer through which carriers move, and a graphene layer between the gate and the active layer. The graphene layer may be configured to function both as an electrode of the active layer and a channel layer of the transistor.
Abstract:
A method of preparing graphene includes forming a silicon carbide thin film on a substrate, forming a metal thin film on the silicon carbide thin film, and forming a metal composite layer and graphene on the substrate by heating the silicon carbide thin film and the metal thin film.
Abstract:
A graphene device includes: a semiconductor substrate having a first region and a second region; a graphene layer on the first region, but not on the second region of the semiconductor substrate; a first electrode on a first portion of the graphene layer; a second electrode on a second portion of the graphene layer; an insulating layer between the graphene layer and the second electrode; and a third electrode on the second region of the semiconductor substrate. The semiconductor substrate has a tunable Schottky barrier formed by junction of the first electrode, the graphene layer, and the semiconductor substrate.
Abstract:
According to example embodiments, an electronic device includes: a semiconductor layer; a graphene directly contacting a desired (and/or alternatively predetermined) area of the semiconductor layer; and a metal layer on the graphene. The desired (and/or alternatively predetermined) area of the semiconductor layer include one of: a constant doping density, a doping density that is equal to or less than 1019 cm−3, and a depletion width of less than or equal to 3 nm.
Abstract:
According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode are spaced apart from each other and arranged to apply voltages to the graphene channel layer. A gate insulation layer is between the graphene channel layer and a gate electrode.
Abstract:
According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode are spaced apart from each other and arranged to apply voltages to the graphene channel layer. A gate insulation layer is between the graphene channel layer and a gate electrode.
Abstract:
A graphene memory includes a source and a drain spaced apart from each other on a conductive semiconductor substrate, a graphene layer contacting the conductive semiconductor substrate and spaced apart from and between the source and the drain, and a gate electrode on the graphene layer. A Schottky barrier is formed between the conductive semiconductor substrate and the graphene layer such that the graphene layer is used as a charge-trap layer for storing charges.
Abstract:
According to example embodiments, a graphene switching devices having a tunable barrier includes a semiconductor substrate that includes a first well doped with an impurity, a first electrode on a first area of the semiconductor substrate, an insulation layer on a second area of the semiconductor substrate, a graphene layer on the insulation layer and extending onto the semiconductor substrate toward the first electrode, a second electrode on the graphene layer and insulation layer, a gate insulation layer on the graphene layer, and a gate electrode on the gate insulation layer. The first area and the second area of the semiconductor substrate may be spaced apart from each other. The graphene layer is spaced apart from the first electrode. A lower portion of the graphene layer may contact the first well. The first well is configured to form an energy barrier between the graphene layer and the first electrode.