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公开(公告)号：US20150192946A1
公开(公告)日：2015-07-09
申请号：US14513800
申请日：2014-10-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sunwoo Kwon , Myung-Jin Lee
IPC: G05F3/08
Abstract: A reference voltage generator including an electrostatic discharge (ESD) resistor, a first branch coupled to the ESD resistor and including a first capacitor, a second branch coupled to the ESD resistor and including a second capacitor, wherein the first and second capacitors are coupled in parallel, a first switch configured to control a first charge transfer path leading to the first branch, and a second switch configured to control a second charge transfer path leading to the second branch.
Abstract translation: 一种参考电压发生器，包括静电放电（ESD）电阻器，耦合到ESD电阻器并包括第一电容器的第一支路，耦合到ESD电阻器并包括第二电容器的第二支路，其中第一和第二电容器耦合在 配置成控制通向第一分支的第一电荷转移路径的第一开关和被配置为控制通向第二分支的第二电荷传输路径的第二开关。
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公开(公告)号：US09742428B2
公开(公告)日：2017-08-22
申请号：US15097715
申请日：2016-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Mooyeol Choi , Hyungdong Roh , Bai-Sun Kong , Sunwoo Kwon , Myung-Jin Lee
Abstract: A delta-sigma modulator includes a loop filter, a quantizer configured to change an analog output signal into a digital signal, and a digital-to-analog converter configured to receive the digital signal and including a first capacitor and a second capacitor. In a first sampling period, the first capacitor is discharged, and at the same time, the second capacitor is charged with a reference voltage. In a second sampling period, the digital signal includes noise caused by a clock jitter, the first capacitor is charged with a reference voltage, and the second capacitor is discharged and generates a charge corresponding to the noise. In a next first sampling period, the first capacitor is discharged, and at the same time, the second capacitor generates a noise current corresponding to the noise using the charge and is charged with a reference voltage.
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公开(公告)号：US09557759B2
公开(公告)日：2017-01-31
申请号：US14513800
申请日：2014-10-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sunwoo Kwon , Myung-Jin Lee
Abstract: A reference voltage generator including an electrostatic discharge (ESD) resistor, a first branch coupled to the ESD resistor and including a first capacitor, a second branch coupled to the ESD resistor and including a second capacitor, wherein the first and second capacitors are coupled in parallel, a first switch configured to control a first charge transfer path leading to the first branch, and a second switch configured to control a second charge transfer path leading to the second branch.
Abstract translation: 一种参考电压发生器，包括静电放电（ESD）电阻器，耦合到ESD电阻器并包括第一电容器的第一支路，耦合到ESD电阻器并包括第二电容器的第二支路，其中第一和第二电容器耦合在 配置成控制通向第一分支的第一电荷转移路径的第一开关和被配置为控制通向第二分支的第二电荷传输路径的第二开关。
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公开(公告)号：US12015418B2
公开(公告)日：2024-06-18
申请号：US17815678
申请日：2022-07-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Moo Yeol Choi , Young Hyun Yoon , Hyun Sun Shim , Myung-Jin Lee
CPC classification number: H03M1/08
Abstract: A noise filtering circuit, a digital to analog converter and an electronic device are provided. The noise filtering circuit comprises a first amplifier configured to receive a bias voltage at a first input terminal, receive a bias output voltage at a second input terminal though a feedback path, and compensate for a difference between the bias voltage and the bias output voltage; a first transistor connected to an output of the first amplifier and having a gate to which an off-voltage is applied; a first capacitor connected to the first transistor; a second capacitor connected to the output of the first amplifier; a second transistor connected to the second capacitor and having a gate to which an off-voltage is applied, and a second amplifier having an input terminal connected to the first capacitor and a second input terminal connected to the second transistor.
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Patent Agency Ranking
公开(公告)号：US09888320B2
公开(公告)日：2018-02-06
申请号：US15172877
申请日：2016-06-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyungdong Roh , Myung-Jin Lee , Yonghee Lee
CPC classification number: H04R5/04 , H01R24/58 , H01R2107/00 , H04R1/1041 , H04R29/00 , H04R2420/03
Abstract: Disclosed is an audio device including an audio codec circuit connected to a first channel electrode, a second channel electrode, and a microphone detection electrode, and a jack detection circuit connected to a first channel detection electrode, a ground detection electrode, and the microphone detection electrode, and, in response to voltages of the first channel detection electrode and the ground detection electrode corresponding to a ground voltage, the jack detection circuit detects insertion of a jack, applies the ground voltage to the ground detection electrode, and applies a bias voltage to the microphone detection electrode.
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公开(公告)号：US09832563B2
公开(公告)日：2017-11-28
申请号：US14542936
申请日：2014-11-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Myung-Jin Lee , Pan-Jong Kim
CPC classification number: H04R1/1091 , H03G3/348 , H04R3/00
Abstract: A headphone driver includes a pre-main amplifier and a main amplifier. The pre-main amplifier receives an input signal from first and second node and outputs the input signal to a third node. The main amplifier is between the third node and a fourth node. A first switch is between the fourth node and a fifth node. A second switch is between the fourth node and a sixth node. A third switch is between the fourth node and a seventh node. A fourth switch is between the fifth and seventh nodes. A fifth switch is between the first and fifth nodes. A capacitor is between the third and fifth nodes. A first feedback resistor is between the first and seventh nodes. A second feedback resistor is between the second and sixth nodes, and the sixth and seventh nodes are connected to a speaker.
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7.发明授权公开(公告)号：US10728658B2
公开(公告)日：2020-07-28
申请号：US15983460
申请日：2018-05-18
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myung-Jin Lee , Young-Hun Kim
IPC: H04R3/00 , H02H1/00 , H02H7/20 , H01R13/703 , H02H9/04
Abstract: An electronic circuit includes an output generator and an over-voltage detector. The output generator is configured to output an output signal to an output terminal. In response to an amplitude of a voltage of the output terminal being greater than an allowable amplitude, the over-voltage detector is configured to output an over-voltage detection signal of a first logic value, such that elements included in the output generator are turned off. In response to the over-voltage detector outputting the over-voltage detection signal of the first logic value again before a reference time elapses after the first logic value of the over-voltage detection signal changes to a second logic value of the over-voltage detection signal, the turned-off elements remain turned off. In response to the over-voltage detector outputting the over-voltage detection signal of the second logic value during the reference time, the turned-off elements are turned on.
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8.发明申请DELTA SIGMA MODULATOR FOR SHAPING NOISE AND AUDIO CODEC HAVING THE SAME 有权用于形成噪声的DELTA SIGMA调制器和具有该噪声的音频编码公开(公告)号：US20170019123A1
公开(公告)日：2017-01-19
申请号：US15097715
申请日：2016-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Mooyeol Choi , Hyungdong Roh , Bai-Sun Kong , Sunwoo Kwon , Myung-Jin Lee
Abstract: A delta-sigma modulator includes a loop filter, a quantizer configured to change an analog output signal into a digital signal, and a digital-to-analog converter configured to receive the digital signal and including a first capacitor and a second capacitor. In a first sampling period, the first capacitor is discharged, and at the same time, the second capacitor is charged with a reference voltage. In a second sampling period, the digital signal includes noise caused by a clock jitter, the first capacitor is charged with a reference voltage, and the second capacitor is discharged and generates a charge corresponding to the noise. In a next first sampling period, the first capacitor is discharged, and at the same time, the second capacitor generates a noise current corresponding to the noise using the charge and is charged with a reference voltage.
Abstract translation: Δ-Σ调制器包括环路滤波器，被配置为将模拟输出信号改变为数字信号的量化器，以及被配置为接收数字信号并包括第一电容器和第二电容器的数/模转换器。 在第一采样周期中，第一电容器被放电，同时第二电容器被充以基准电压。 在第二采样周期中，数字信号包括由时钟抖动引起的噪声，第一电容器用参考电压充电，并且第二电容器被放电并产生对应于噪声的电荷。 在接下来的第一采样周期中，第一电容器被放电，并且同时第二电容器使用电荷产生与噪声相对应的噪声电流并且对基准电压进行充电。
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公开(公告)号：US09450599B1
公开(公告)日：2016-09-20
申请号：US15057273
申请日：2016-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-Woo Kwon , Myung-Jin Lee
Abstract: A current DAC circuit includes a reference current source, a current mirror, a decoder, and one or more current DAC units. The reference current source provides a reference current to a first node. The current mirror includes first and second PMOS transistors configured to provide a copy current generated by copying the reference current to a second node and coupled, at respective drains, to separate nodes. The current mirror may reduce noise of the first and second PMOS transistors through swapping the separate nodes to which the respective drains of the first and second PMOS transistors are connected periodically according to first and second clock signals. The decoder generates one or more enable signals based on a data input signal. One or more current DAC units generate separate positive currents and negative currents based on the copy current and separate enable signals of the one or more enable signals, respectively.
Abstract translation: 电流DAC电路包括参考电流源，电流镜，解码器和一个或多个电流DAC单元。 参考电流源向第一个节点提供参考电流。 电流镜包括第一和第二PMOS晶体管，其被配置为提供通过将参考电流复制到第二节点而产生的复制电流，并在相应的漏极处耦合到分离的节点。 电流镜可以通过交换根据第一和第二时钟信号周期性地连接第一和第二PMOS晶体管的相应的漏极的分离节点来减少第一和第二PMOS晶体管的噪声。 解码器基于数据输入信号产生一个或多个使能信号。 一个或多个电流DAC单元分别基于复制电流和一个或多个使能信号的单独使能信号产生单独的正电流和负电流。
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