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    I/O device and computing host interoperation
    1.
    发明授权
    I/O device and computing host interoperation 有权

    公开(公告)号：US10514864B2

    公开(公告)日：2019-12-24

    申请号：US15661079

    申请日：2017-07-27

    Applicant: Seagate Technology LLC

    Inventor： Earl T. Cohen ,  Timothy L. Canepa

    IPC: G06F12/1027 ,  G06F3/06 ,  G06F12/00

    Abstract: Methods, systems and computer-readable storage media for receiving, via an external interface of a storage device, a command from a computing host, the command including at least one non-standard command modifier, executing the command according to a particular non-standard command modifier, storing an indication of the particular non-standard command modifier in an entry of a map associated with a logical block address of the command, and storing a shadow copy of the map in a memory of the computing host.

    Dynamic bandwidth reporting for solid-state drives
    2.
    发明授权
    Dynamic bandwidth reporting for solid-state drives 有权

    公开(公告)号：US10156999B2

    公开(公告)日：2018-12-18

    申请号：US15082492

    申请日：2016-03-28

    Applicant: Seagate Technology LLC

    Inventor： Timothy L. Canepa ,  Ramdas P. Kachare

    IPC: G06F3/06 ,  G06F12/02 ,  G06F13/16

    Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.

    Scalable Data Structures for Control and Management of Non-Volatile Storage
    3.
    发明申请
    Scalable Data Structures for Control and Management of Non-Volatile Storage 审中-公开
    用于非易失性存储的控制和管理的可扩展数据结构

    公开(公告)号：US20160070496A1

    公开(公告)日：2016-03-10

    申请号：US14942475

    申请日：2015-11-16

    Applicant: Seagate Technology LLC

    Inventor： Earl T. Cohen ,  Timothy L. Canepa

    IPC: G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/0616 ,  G06F3/0634 ,  G06F3/0644 ,  G06F3/0655 ,  G06F3/0688 ,  G06F12/00 ,  G06F12/0246 ,  G06F12/0292 ,  G06F2212/7206 ,  G06F2212/7207 ,  G06F2212/7208 ,  G06F2212/7211 ,  Y02D10/13

    Abstract: Method and apparatus for managing data in a Non-Volatile Memory (NVD). In some embodiments, management information is stored in a buffer memory using a Solid-State Disk (SSD) controller circuit, the management information comprising a map data structure that associates storage addresses of a host device to physical addresses of the NVD. A location in the management information is determined responsive to a selected host storage address and a programmable parameter by arithmetically dividing in accordance with a divisor specified at least in part by the programmable parameter. The location in the management information is used to direct a transfer of user data by the SSD control circuit between the host device and the NVM.

    Abstract translation: 用于管理非易失性存储器（NVD）中的数据的方法和装置。 在一些实施例中，使用固态盘（SSD）控制器电路将管理信息存储在缓冲存储器中，所述管理信息包括将主机设备的存储地址与NVD的物理地址相关联的地图数据结构。 根据至少部分地由可编程参数指定的除数通过算术分割来响应所选择的主机存储地址和可编程参数来确定管理信息中的位置。 管理信息中的位置用于在主机设备和NVM之间引导SSD控制电路传送用户数据。

    Flash translation layer with lower write amplification
    4.
    发明授权
    Flash translation layer with lower write amplification 有权
    Flash转换层具有较低的写入放大率

    公开(公告)号：US09213633B2

    公开(公告)日：2015-12-15

    申请号：US13889521

    申请日：2013-05-08

    Applicant: Seagate Technology LLC

    Inventor： Timothy L. Canepa ,  Earl T. Cohen ,  Alex G. Tang

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/7201

    Abstract: A method of associating a logical block address with a physical location in a non-volatile memory includes (A) in response to a write request comprising a respective logical block address in a logical block address space and respective data to be written to the non-volatile memory, determining a physical location in the non-volatile memory to store the respective data of the write request, (B) adding an entry to a journal, such that the added entry trails any entries already in the journal and the added entry has a respective logical block address field set to the respective logical block address of the write request and a respective physical location field set to the determined physical location, and (C) updating one of a plurality of second-level map pages in a two-level map according to the respective logical block address of the write request with the determined physical location.

    Abstract translation: 将逻辑块地址与非易失性存储器中的物理位置相关联的方法包括（A）响应于包括逻辑块地址空间中的相应逻辑块地址的写请求以及要写入非易失性存储器的相应数据， 确定非易失性存储器中的物理位置以存储写入请求的相应数据，（B）将条目添加到日志，使得添加的条目跟踪已经在日志中的任何条目，并且添加的条目具有 设置到写请求的相应逻辑块地址的相应逻辑块地址字段和设置到所确定的物理位置的相应物理位置字段，以及（C）更新两级中的多个二级地图页之一 根据具有确定的物理位置的写请求的相应逻辑块地址映射。

    SELF-JOURNALING AND HIERARCHICAL CONSISTENCY FOR NON-VOLATILE STORAGE
    7.
    发明申请
    SELF-JOURNALING AND HIERARCHICAL CONSISTENCY FOR NON-VOLATILE STORAGE 审中-公开

    公开(公告)号：US20170161191A1

    公开(公告)日：2017-06-08

    申请号：US14611258

    申请日：2015-02-01

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Earl T. Cohen ,  Timothy L. Canepa

    IPC: G06F12/0815

    CPC classification number: G06F12/0815 ,  G06F11/07 ,  G06F12/0246 ,  G06F12/0292 ,  G06F2212/1032 ,  G06F2212/621 ,  G06F2212/7201 ,  G06F2212/7207 ,  G11C16/02 ,  G11C16/06

    Abstract: A non-volatile storage system having Non-Volatile Memory (NVM) provides self-journaling and hierarchical consistency, enabling low-latency recovery and force unit access handshake. Mappings between host addresses and addresses in the NVM are maintained via one or more map entries, enabling locating of host data written to the NVM. Objects stored in the NVM include sufficient information to recover the object solely within the object itself. The NVM is managed as one or more data streams, a map stream, and a checkpoint stream. Host data is written to the data streams, map entries are written to the map stream, and checkpoints of map entries and other data structures are written to the checkpoint stream. Time markers embedded in the streams enable determination, during recovery, that selected portions of the streams are inconsistent with each other and are to be discarded.

    I/O device and computing host interoperation
    8.
    发明授权
    I/O device and computing host interoperation 有权

    公开(公告)号：US10936251B2

    公开(公告)日：2021-03-02

    申请号：US16684027

    申请日：2019-11-14

    Applicant: Seagate Technology LLC

    Inventor： Earl T. Cohen ,  Timothy L. Canepa

    IPC: G06F3/06 ,  G06F12/00 ,  G06F12/1027

    Abstract: Methods, systems, and computer-readable storage media for a storage device to, upon receiving a command from a computing host, determine whether or not the command includes location information targeting a particular portion of a NVM of the storage device, the location information having been retrieved by the computing host from a shadow map and included with the command. Upon determining that the command includes location information, the command is processed by the storage device using the included location information. Upon determining that the command does not include location information, the storage device determines the particular portion of the NVM targeted by the command based on a map stored in a memory of the storage device before processing the command.

    Dynamic bandwidth reporting for solid-state drives
    9.
    发明授权
    Dynamic bandwidth reporting for solid-state drives 有权

    公开(公告)号：US10346058B2

    公开(公告)日：2019-07-09

    申请号：US16186958

    申请日：2018-11-12

    Applicant: Seagate Technology LLC

    Inventor： Timothy L. Canepa ,  Ramdas P. Kachare

    IPC: G06F3/06 ,  G06F13/16 ,  G06F12/02

    Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a host interface circuit connectable to a host. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory, compute a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from the host, compute a second bandwidth of the memory that is available to the host through the host interface circuit based on the first bandwidth consumed by the controller, receive a hypothetical consumption of additional bandwidth by the host, update the second bandwidth based on the hypothetical consumption, and report the second bandwidth as updated to the host through the host interface circuit.

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