公开(公告)号：US11282673B2

公开(公告)日：2022-03-22

申请号：US16996696

申请日：2020-08-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ying-Chieh Meng ,  Chui-Ya Peng ,  Nai-Han Cheng

IPC: H01J37/317 ,  H01J37/08 ,  H01J27/20 ,  H01L21/8238 ,  C23C14/48 ,  H01L21/265

Abstract: The present disclosure describes an ion implantation system that includes a bushing designed to reduce the accumulation of IMP by-produces on the bushing's inner surfaces. The ion implantation system can include a chamber, an ion source configured to generate an ion beam, and a bushing coupling the ion source and the chamber. The bushing can include (i) a tubular body having an inner surface, a first end, and a second end and (ii) multiple angled trenches disposed within the inner surface of the tubular body, where each of the multiple angled trenches extends towards the second end of the tubular body.

公开(公告)号：US11139183B2

公开(公告)日：2021-10-05

申请号：US15988326

申请日：2018-05-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsui-Wei Wang ,  Yung-Li Tsai ,  Chui-Ya Peng

IPC: H01L21/67 ,  H01L21/687 ,  B08B3/04 ,  H01L21/02

Abstract: In an embodiment, a system includes: a first robotic arm configured to transport a wafer into a cleaning chamber, wherein the first robotic arm comprises a first hood that substantially covers the wafer when transported on the first robotic arm; the cleaning chamber configured to clean the wafer; a second robotic arm configured to transport the wafer out of the cleaning chamber, wherein the second robotic arm comprises a second hood that substantially covers the wafer when transported on the second robotic arm, wherein the second robotic arm is different than the first robotic arm.

公开(公告)号：US10325796B2

公开(公告)日：2019-06-18

申请号：US15797466

申请日：2017-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Feng Chen ,  Yan Cing Lin ,  Chui-Ya Peng

IPC: H01L21/677 ,  H01L21/687 ,  G01B5/30 ,  H01L21/66 ,  H01L21/67

Abstract: An apparatus includes a holder configured to carry one or more semiconductor wafers, an arm coupled with the holder, and a detector coupled with either the holder or the arm. The detector is configured to measure a change in weight of the one or more semiconductor wafers. The detector includes a strain gauge weight sensor, a piezoelectric sensor, or any other suitable sensor. The change in weight of the one or more semiconductor wafers is used to determine any possible presence of a broken or missing wafer.

公开(公告)号：US20190035697A1

公开(公告)日：2019-01-31

申请号：US15940357

申请日：2018-03-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Fen Chen ,  Tsung-Ying Liu ,  Yeh-Hsun Fang ,  Bang-Yu Huang ,  Chui-Ya Peng

IPC: H01L21/66 ,  C30B29/06 ,  C30B25/16 ,  C23C16/02 ,  C23C16/24 ,  C23C16/52 ,  H01L21/02 ,  H01L21/306

Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A depth parameter (t) the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on a pre-determined standard reference curve comprising a plurality of references depth parameters in a first range as a function of a plurality of reference processing temperatures in a second range.

公开(公告)号：US12068179B2

公开(公告)日：2024-08-20

申请号：US17737765

申请日：2022-05-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsui-Wei Wang ,  Yung-Li Tsai ,  Chui-Ya Peng

IPC: H01L21/67 ,  B08B15/04 ,  H01L21/02

CPC classification number: H01L21/6715 ,  B08B15/04 ,  H01L21/02057 ,  H01L21/67051

Abstract: In an embodiment, a system includes: a wafer support configured to secure a wafer; a nozzle configured to dispense a liquid or a gas on the wafer when the nozzle is in an active state of dispensing; a shutter configured to catch the liquid from the nozzle when the shutter is in a first position below the nozzle; and a shutter actuator configured to: move the shutter to the first position in response to the nozzle not being in an inactive state; move the shutter to a second position away from the first position in response to the nozzle being in the active state.

公开(公告)号：US20210313144A1

公开(公告)日：2021-10-07

申请号：US16837724

申请日：2020-04-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ying-Chieh Meng ,  Chui-Ya Peng ,  Shih-Hao Lin

IPC: H01J37/317 ,  H01J37/08 ,  H01J37/32 ,  H01L21/265

Abstract: An ion implantation system including an ion implanter, a dopant source gas supply system and a monitoring system is provided. The ion implanter is inside a housing and includes an ion source unit. The dopant source gas supply system includes a first and a second dopant source gas storage cylinder in a gas cabinet outside of the housing and configured to supply a dopant source gas to the ion source unit, and a first and a second dopant source gas supply pipe coupled to respective first and second dopant source gas storage cylinders. Each of the first and second dopant source gas supply pipes includes an inner pipe and an outer pipe enclosing the inner pipe. The monitoring system is coupled to the outer pipe of each of the first and the second dopant source gas supply pipes.

公开(公告)号：US10818563B2

公开(公告)日：2020-10-27

申请号：US16696890

申请日：2019-11-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Fen Chen ,  Tsung-Ying Liu ,  Yeh-Hsun Fang ,  Bang-Yu Huang ,  Chui-Ya Peng

IPC: H01L21/02 ,  H01L21/66 ,  C30B29/06 ,  C30B25/16 ,  C23C16/02 ,  H01L21/306 ,  C23C16/52 ,  C23C16/24 ,  C30B25/18

Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A first depth parameter (t) of the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on the first depth parameter (t).

公开(公告)号：US10319857B2

公开(公告)日：2019-06-11

申请号：US15796853

申请日：2017-10-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Fen Chen ,  Chui-Ya Peng ,  Ching Yu ,  Pin-Hen Lin ,  Yen Chuang ,  Yuh-Ta Fan

IPC: H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165

Abstract: A semiconductor device includes a substrate, a liner, and an epitaxy structure. The substrate has a recess. The liner is disposed in the recess. The liner is denser than the substrate. The epitaxy structure is disposed in the recess. The liner is disposed between the epitaxy structure and the substrate.

公开(公告)号：US09589969B1

公开(公告)日：2017-03-07

申请号：US14996233

申请日：2016-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wei Chang ,  Austin Hsu ,  Kung-Wei Lee ,  Chui-Ya Peng

IPC: H01L29/788 ,  H01L27/112 ,  H01L21/48 ,  H01L23/525

CPC classification number: H01L21/485 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/568 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: Semiconductor devices and manufacturing methods of the same are disclosed. The semiconductor device includes a die, a conductive structure, a bonding pad and a passivation layer. The conductive structure is over and electrically connected to the die. The bonding pad is over and electrically connected to the conductive structure. The passivation layer is over the bonding pad, wherein the passivation layer includes a nitride-based layer with a refractive index of about 2.16 to 2.18.

Abstract translation: 公开了半导体器件及其制造方法。 半导体器件包括管芯，导电结构，焊盘和钝化层。 导电结构与模具完全电连接。 接合焊盘在导电结构上方电连接。 钝化层在焊盘上方，其中钝化层包括折射率为约2.16至2.18的基于氮化物的层。

公开(公告)号：US11923210B2

公开(公告)日：2024-03-05

申请号：US16547428

申请日：2019-08-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Chun Hsu ,  Shu-Yen Wang ,  Chui-Ya Peng

IPC: H01L21/02 ,  H01L21/67

CPC classification number: H01L21/67057 ,  H01L21/02057 ,  H01L21/67034 ,  H01L21/67248 ,  H01L21/67253

Abstract: In an embodiment, a method includes: immersing a wafer in a bath within a cleaning chamber; removing the wafer out of the bath through a solvent and into a gas within the cleaning chamber; determining a parameter value from the gas; and performing remediation within the cleaning chamber in response to determining that the parameter value is beyond a threshold value.