公开(公告)号：US5633640A

公开(公告)日：1997-05-27

申请号：US349592

申请日：1994-12-05

申请人： Todd L. Barker ,  Alan L. Westwick

发明人： Todd L. Barker ,  Alan L. Westwick

IPC分类号： H03M1/08 ,  H03M1/46 ,  H03M3/02 ,  H03M1/12

CPC分类号： H03M1/089 ,  H03M3/368 ,  H03M1/46 ,  H03M3/458

摘要： A data converter (10) includes an analog input element (12), an operational amplifier (14), a first reference input element (18), a second reference input element (22), and a control element (34). The analog input element (12) operably couples the analog signal to a first input (13) of the operational amplifier (14). The first and second reference input elements (18 & 22) respectively couple a first signal (16) and a second signal (22) to a first input of the operational amplifier (14). The control element (34) generates the control signal based on an output of the operational amplifier (14) to force the first input node (13) to be equivalent to the second input node (15) of the operational amplifier (14). The data converter (10) also includes an analog-to-digital converter (26) that allows the circuit to perform a sigma-delta conversion.

摘要翻译： 数据转换器（10）包括模拟输入元件（12），运算放大器（14），第一参考输入元件（18），第二参考输入元件（22）和控制元件（34）。 模拟输入元件（12）可操作地将模拟信号耦合到运算放大器（14）的第一输入端（13）。 第一和第二参考输入元件（18和22）分别将第一信号（16）和第二信号（22）耦合到运算放大器（14）的第一输入端。 控制元件（34）基于运算放大器（14）的输出产生控制信号，以迫使第一输入节点（13）等效于运算放大器（14）的第二输入节点（15）。 数据转换器（10）还包括允许电路执行Σ-Δ转换的模拟 - 数字转换器（26）。

公开(公告)号：US07908500B2

公开(公告)日：2011-03-15

申请号：US11865661

申请日：2007-10-01

申请人： Alan L. Westwick ,  Donelson A. Shannon ,  Dazhi Wei ,  Xiaoling Guo ,  Gabriel Vogel

发明人： Alan L. Westwick ,  Donelson A. Shannon ,  Dazhi Wei ,  Xiaoling Guo ,  Gabriel Vogel

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3243 ,  Y02D10/152

摘要： A microcontroller includes a processing unit having a processing unit having normal power mode of operation and a low power mode of operation. The processing unit further having digital circuitry connected to the processing unit having a plurality of logic circuits associated therewith for processing digital values. A plurality of retention flip-flops are associated with the digital circuitry for storing a logical state of at least one or more of the logic circuits within the digital circuitry when the processing unit enters the low power mode of operation. The plurality of retention flip flops include a first type of transistors for operating in both the low and high power modes of operation and a second type of transistors for operation only in the normal mode of operation and wherein substantially the remainder of the digital circuitry in the processing unit comprises the second type of transistors.

摘要翻译： 微控制器包括具有处理单元的处理单元，该处理单元具有正常的功率操作模式和低功率操作模式。 处理单元还具有连接到处理单元的数字电路，其具有与其相关联的多个逻辑电路以处理数字值。 当处理单元进入低功率操作模式时，多个保持触发器与数字电路相关联，用于存储数字电路内的至少一个或多个逻辑电路的逻辑状态。 多个保持触发器包括用于在低功率和高功率工作模式下操作的第一类型的晶体管，以及用于仅在正常操作模式下操作的第二类型的晶体管，并且其中基本上在其中的数字电路的其余部分 处理单元包括第二类型的晶体管。

公开(公告)号：US07802113B2

公开(公告)日：2010-09-21

申请号：US11618433

申请日：2006-12-29

申请人： Alan L. Westwick ,  Ka Y. Leung

发明人： Alan L. Westwick ,  Ka Y. Leung

IPC分类号： G06F1/26

CPC分类号： H02M3/156

摘要： An integrated system on a chip includes processing circuitry that performs predefined digital processing functions on the chip. The processing circuitry operates responsive to a regulated voltage. An on-chip boost converter generates the regulated voltage responsive to an off-chip voltage provided by an off chip voltage source. The regulated voltage source has a voltage level greater than the off-chip voltage.

摘要翻译： 芯片上的集成系统包括在芯片上执行预定义的数字处理功能的处理电路。 处理电路响应于调节电压而工作。 片上升压转换器响应于由片外电压源提供的片外电压产生调节电压。 调节电压源具有大于片外电压的电压电平。

公开(公告)号：US5160894A

公开(公告)日：1992-11-03

申请号：US822224

申请日：1992-01-17

申请人： Alan L. Westwick

发明人： Alan L. Westwick

IPC分类号： G06F1/04 ,  H03B19/00 ,  H03L7/00

CPC分类号： G06F1/04 ,  H03B19/00 ,  H03L7/00

摘要： A frequency synthesizer circuit (10). Circuit (10) has a counter (12), a latch/decoder (14), a divider (16), and an optional wave shaper (18) which synthesize an output clock signal X. Counter (12) counts a number of clock signal N periods that occur within one clock signal M period and this count is stored as a count value. The count value is latched and/or decoded by the latch/decoder (14) to produce a divisor which is output from the latch/decoder (14) to the divider (16). The divider (16) divides a clock signal N frequency by the divisor to provide a spiked waveform to the wave shaper (18). The wave shaper (18) alters a frequency and/or a duty cycle of the spiked waveform to produce the clock signal X. Clock signal X has a substantially constant frequency regardless of the clock signal N frequency or operational variation in the system clock N frequency.

摘要翻译： 频率合成器电路（10）。 电路（10）具有计数器（12），锁存/解码器（14），分频器（16）和可选的波形整形器（18），其合成输出时钟信号X.计数器（12）对多个时钟 在一个时钟信号M周期内发生信号N个周期，并且该计数被存储为计数值。 计数值被锁存/解码器（14）锁存和/或解码，以产生从锁存/解码器（14）输出到除法器（16）的除数。 分频器（16）将时钟信号N频率除以除数以向波形整形器（18）提供加标波形。 波形整形器（18）改变加标波形的频率和/或占空比以产生时钟信号X.时钟信号X具有基本恒定的频率，而不管时钟信号N的频率或系统时钟的频率N的频率 。

公开(公告)号：US20130221940A1

公开(公告)日：2013-08-29

申请号：US13404558

申请日：2012-02-24

申请人： Shouli Yan ,  Dazhi Wei ,  Alan L. Westwick

发明人： Shouli Yan ,  Dazhi Wei ,  Alan L. Westwick

IPC分类号： G05F1/10

CPC分类号： G05F1/565

摘要： A technique includes using a pass device of a linear regulator to provide an output signal for the linear regulator in response to a signal that is received at a control terminal of the pass device. The control terminal is coupled to a node, and the node is associated with a bias current. The technique includes using a feedback path to communicate a feedback current with the node to regulate the output signal. The use of the feedback path includes regulating a magnitude of the feedback current to be within a range of magnitudes, which include a magnitude that exceeds a magnitude of the bias current.

摘要翻译： 一种技术包括使用线性调节器的通过装置来响应于在通过装置的控制端子处接收到的信号来为线性调节器提供输出信号。 控制终端耦合到节点，节点与偏置电流相关联。 该技术包括使用反馈路径将反馈电流与节点通信以调节输出信号。 反馈路径的使用包括将反馈电流的幅度调节在包括超过偏置电流的幅度的幅度的幅度范围内。

公开(公告)号：US20120173787A1

公开(公告)日：2012-07-05

申请号：US12981741

申请日：2010-12-30

申请人： Alan L. Westwick ,  Thomas S. David

发明人： Alan L. Westwick ,  Thomas S. David

IPC分类号： G06F13/20

CPC分类号： G06F1/26 ,  G06F1/00 ,  G06F13/14

摘要： An apparatus includes an integrated circuit, which includes a processor and a driver. The integrated circuit is fabricated by a process that establishes a nominal maximum voltage for components of the integrated circuit. The driver is adapted to selectively electrically couple a voltage that is higher than the nominal maximum voltage to an external terminal of the integrated circuit.

摘要翻译： 一种装置包括集成电路，其包括处理器和驱动器。 集成电路是通过为集成电路的组件建立标称最大电压的过程制造的。 驱动器适于选择性地将高于标称最大电压的电压电耦合到集成电路的外部端子。

公开(公告)号：US08149062B2

公开(公告)日：2012-04-03

申请号：US11321753

申请日：2005-12-29

申请人： Susanne A. Paul ,  Alan L. Westwick ,  Timothy J. Dupuis

发明人： Susanne A. Paul ,  Alan L. Westwick ,  Timothy J. Dupuis

IPC分类号： H03F3/04

CPC分类号： H03F3/193 ,  H01L23/645 ,  H01L2223/6644 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3011 ,  H03F3/195 ,  H03F3/2173 ,  H03F3/2176 ,  H03F3/30 ,  H03F3/45224 ,  H03F3/72 ,  H03F2203/45644 ,  H03F2203/45704 ,  H03K17/04163 ,  H03K17/6872 ,  H01L2224/0401

摘要： A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals. Differential RF power amplifiers are also provided with inductive networks coupled at various nodes of the power amplifiers.

摘要翻译： 提供了一种用于功率放大器的方法和装置，用于降低晶体管经受的峰值电压。 功率放大器设置有第一和第二开关装置和连接在开关装置之间的电感器。 驱动开关装置，使得开关装置在相同的时间间隔期间被接通和断开。 差分RF功率放大器还提供耦合在功率放大器各个节点的感应网络。

公开(公告)号：US07852061B2

公开(公告)日：2010-12-14

申请号：US11865648

申请日：2007-10-01

申请人： Jia-Hau Liu ,  Alan L. Westwick ,  Douglas S. Piasecki

发明人： Jia-Hau Liu ,  Alan L. Westwick ,  Douglas S. Piasecki

IPC分类号： G05F3/16

CPC分类号： G05F3/30 ,  H02M2001/0032 ,  Y02B70/16 ,  Y10S323/907

摘要： An apparatus comprises a band gap voltage generator circuit for generating a band gap voltage. A temperature invariant current generator is located within the band gap voltage generator circuit for generating a temperature invariant current. A temperature invariant current correction circuit is located within the band gap voltage generator circuit and adjusts the output voltage responsive to the temperature invariant current without altering temperature characteristics of the temperature invariant current.

摘要翻译： 一种装置包括用于产生带隙电压的带隙电压发生器电路。 温度不变电流发生器位于带隙电压发生器电路内，用于产生温度不变电流。 温度不变电流校正电路位于带隙电压发生器电路内，并根据温度不变电流调节输出电压，而不改变温度不变电流的温度特性。

公开(公告)号：US07233199B2

公开(公告)日：2007-06-19

申请号：US11278078

申请日：2006-03-30

申请人： Alan L. Westwick ,  Susanne A. Paul

发明人： Alan L. Westwick ,  Susanne A. Paul

IPC分类号： H03F1/36

CPC分类号： H03F3/189 ,  H03F1/30 ,  H03F3/45941

摘要： A method and apparatus is used to provide DC stabilization and noise reduction in a multistage power amplifier. The invention uses various feedback techniques to stabilize DC levels, which helps to reduce noise. The invention also uses other techniques to reduce noise, and to reduce the noise transfer function in a power amplifier.

摘要翻译： 一种方法和装置用于在多级功率放大器中提供直流稳定和降噪。 本发明使用各种反馈技术来稳定DC电平，这有助于降低噪声。 本发明还使用其它技术来降低噪声并降低功率放大器中的噪声传递功能。

公开(公告)号：US5045773A

公开(公告)日：1991-09-03

申请号：US590859

申请日：1990-10-01

申请人： Alan L. Westwick ,  Roger A. Whatley

发明人： Alan L. Westwick ,  Roger A. Whatley

IPC分类号： G05F3/26 ,  G05F3/28

CPC分类号： G05F3/267

摘要： A current source circuit providing a constant output for wide variations in supply voltages is achieved by creating a constant reference current by reflecting the difference in the base to emitter voltage of two bipolar transistors across a resistor. A first current mirror creates an equal current which flows through two diode connected transistors that produce an output voltage proportional to the current flowing through them. This current also flows through a second current mirror which creates an equal current to flow to a feedback connection. The feedback connection adjusts the base voltage of the two bipolar transistors until a current equal to the reference current flows in a third current mirror. The current flowing in this third current mirror is also applied to the feedback connection to insure that all currents remain equal thereby insuring the output remains constant.

摘要翻译： 通过反映电阻器两个双极晶体管的基极与发射极之间的差异来产生恒定的参考电流，可实现提供电源电压宽泛变化的恒定输出的电流源电路。 第一电流镜产生相等的电流，其流过两个二极管连接的晶体管，其产生与流过它们的电流成比例的输出电压。 该电流还流过第二电流镜，其产生相等的电流以流向反馈连接。 反馈连接调节两个双极晶体管的基极电压，直到等于参考电流的电流在第三电流镜中流动。 在该第三电流镜中流动的电流也被施加到反馈连接，以确保所有电流保持相等，从而确保输出保持恒定。