公开(公告)号：US08772073B2

公开(公告)日：2014-07-08

申请号：US12988110

申请日：2009-04-14

申请人： Viet Nguyen Hoang ,  Radu Surdeanu ,  Benoit Bataillou

发明人： Viet Nguyen Hoang ,  Radu Surdeanu ,  Benoit Bataillou

IPC分类号： H01L21/00 ,  H01L27/146 ,  H01L21/3105

CPC分类号： H01L27/14685 ,  H01L21/31053 ,  H01L21/31111 ,  H01L27/14621 ,  H01L27/14629

摘要： A method of providing a dielectric material (18) having regions (18′, 18″) with a varying thickness in an IC manufacturing process is disclosed. The method comprises forming a plurality of patterns in respective regions (20′, 20″) of the dielectric material (18), each pattern increasing the susceptibility of the dielectric material (18) to a dielectric material removal step by a predefined amount and exposing the dielectric material (18) to the dielectric material removal step. In an embodiment, the IC comprises a plurality of pixilated elements (12) and a plurality of light interference elements (24), each comprising a first mirror element (16) and a second mirror element (22), a region of the dielectric material (18) separating the first mirror element (16) and the second element (22), and each being arranged over one of said pixilated elements (12), the method further comprising forming the respective first mirror elements (16) in a dielectric layer (14) over a substrate (10) comprising the plurality of pixilated elements; depositing the dielectric material over the dielectric layer; and forming the respective second mirror elements such that each second mirror element is separated from a respective first mirror element by a region of the exposed dielectric material. Hence, an IC having a layer of a dielectric material (18) comprising regions of different thicknesses can be obtained requiring only a few process steps.

摘要翻译： 公开了一种在IC制造过程中提供具有变化厚度的区域（18'，18“）的介电材料（18）的方法。 该方法包括在介电材料（18）的相应区域（20'，20“）中形成多个图案，每个图案将电介质材料（18）的敏感性增加到电介质材料去除步骤预定量并暴露 介电材料（18）到介电材料去除步骤。 在一个实施例中，IC包括多个像素化元件（12）和多个光干涉元件（24），每个元件包括第一镜元件（16）和第二镜元件（22），介电材料的区域 （18）分离第一镜元件（16）和第二元件（22），并且每个被布置在一个所述像素化元件（12）上，所述方法还包括在电介质层中形成相应的第一镜元件（16） （14）包括多个像素化元件的衬底（10）上; 在电介质层上沉积电介质材料; 以及形成各个第二反射镜元件，使得每个第二反射镜元件通过暴露的电介质材料的区域与相应的第一反射镜元件分离。 因此，可以获得具有包括不同厚度的区域的电介质材料层（18）的IC，只需要几个工艺步骤。

公开(公告)号：US08723443B2

公开(公告)日：2014-05-13

申请号：US13257266

申请日：2010-02-25

申请人： Peter Hubertus Franciscus Deurenberg ,  Gert-Jan Koolen ,  Gian Hoogzaad ,  Radu Surdeanu ,  Pascal Bancken ,  Benoit Bataillou ,  Viet Nguyen Hoang

发明人： Peter Hubertus Franciscus Deurenberg ,  Gert-Jan Koolen ,  Gian Hoogzaad ,  Radu Surdeanu ,  Pascal Bancken ,  Benoit Bataillou ,  Viet Nguyen Hoang

IPC分类号： H05B33/00

CPC分类号： H05B33/086 ,  H05B33/0815 ,  H05B33/0848

摘要： A method is disclosed of controlling a LED, comprising driving the LED with a DC current for a first time, interrupting the DC current for a second time such that the first time and the second time sum to a period, determining at least one characteristic of the LED while the DC current is interrupted, and controlling the DC current during a subsequent period in dependence on the at least one characteristic. The invention thus benefits from the simplicity of DC operation. By operating at the LED in a DC mode, rather than say in a PWM mode, the requirement to be able to adjust the duty cycle is avoided. By including interruptions to the DC current, it is possible to utilize the LED itself to act as a sensor in order to determine a characteristic of the LED. The need for additional sensors is thereby avoided.

摘要翻译： 公开了一种控制LED的方法，包括第一次用DC电流驱动LED，第二次中断DC电流，使得第一时间和第二时间总和到一个周期，确定至少一个特性 所述LED在DC电流中断期间，并且根据所述至少一个特性在随后的时段期间控制所述DC电流。 因此，本发明由于DC操作的简单性而受益。 通过在DC模式下操作LED，而不是在PWM模式下说明，可以避免能够调整占空比的要求。 通过包含直流电流的中断，可以利用LED本身作为传感器，以便确定LED的特性。 从而避免了对附加传感器的需要。

公开(公告)号：US08367552B2

公开(公告)日：2013-02-05

申请号：US10526422

申请日：2003-08-04

申请人： Roel Daamen ,  Viet Nguyen Hoang ,  Romano Julma Oscar Maria Hoofman ,  Greja Johanna Adriana Maria Verheijden

发明人： Roel Daamen ,  Viet Nguyen Hoang ,  Romano Julma Oscar Maria Hoofman ,  Greja Johanna Adriana Maria Verheijden

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/7684 ,  H01L21/7688

摘要： The present invention relates to a method for fabrication of in-laid metal interconnects. The method comprises the steps of providing a substrate with a dielectric material on top thereof, depositing a protection layer on top of the dielectric material, depositing a sacrificial layer on top of the protection layer, the sacrificial layer having a mechanical strength that is lower than the mechanical strength of the protection layer, making an opening) through the sacrificial layer, through the protection layer and into the dielectric material, depositing a barrier layer in the opening and on the sacrificial layer, depositing metal material on the barrier layer, the metal material filling the opening, removing portions of the metal material existing beyond the opening by means of polishing, and removing the barrier layer and the sacrificial layer in one polishing step.

摘要翻译： 本发明涉及一种内置金属互连的制造方法。 该方法包括以下步骤：在其顶部提供介电材料的基底，在电介质材料的顶部上沉积保护层，在保护层的顶部上沉积牺牲层，牺牲层的机械强度低于 保护层的机械强度，形成开口）穿过保护层并进入电介质材料，在开口和牺牲层上沉积阻挡层，在阻挡层上沉积金属材料，金属 填充开口的材料，通过抛光去除存在于开口之外的金属材料的部分，以及在一个抛光步骤中去除阻挡层和牺牲层。

公开(公告)号：US08012872B2

公开(公告)日：2011-09-06

申请号：US11718876

申请日：2005-11-02

申请人： Viet Nguyen Hoang ,  Greja J. A. M. Verheijden

发明人： Viet Nguyen Hoang ,  Greja J. A. M. Verheijden

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76865

摘要： Manufacturing a damascene structure involves: forming a sacrificial layer (20) on a substrate (10) to protect an area around a recess (30) for the damascene structure, forming a barrier layer (40) in the recess, and in electrical contact with the sacrificial layer, forming the damascene structure (50) in the recess, and planarizing. During the planarizing the sacrificial layer reacts electrochemically with the barrier layer or with the damascene structure. This can alter a relative rate of removal of the damascene structure and the sacrificial layer so as to reduce dishing or protrusion of the damascene structure, and reduce copper residues, and reduce barrier corrosion. The barrier layer can be formed by ALCVD. The barrier material being one or more of WCN and TaN. The sacrificial layer can be TaN, TiN or W.

摘要翻译： 制造镶嵌结构包括：在基底（10）上形成牺牲层（20）以保护用于镶嵌结构的凹部（30）周围的区域，在凹槽中形成阻挡层（40），并与 牺牲层，在凹部中形成镶嵌结构（50）并且平坦化。 在平坦化期间，牺牲层与阻挡层或镶嵌结构电化学反应。 这可以改变镶嵌结构和牺牲层的相对去除速率，以减少镶嵌结构的凹陷或凸起，并且减少铜残留物，并减少屏障腐蚀。 阻挡层可以通过ALCVD形成。 阻挡材料是WCN和TaN中的一种或多种。 牺牲层可以是TaN，TiN或W.

公开(公告)号：US20110097896A1

公开(公告)日：2011-04-28

申请号：US10526422

申请日：2003-08-04

申请人： Roel Daamen ,  Viet Nguyen Hoang ,  Romano Hoofman ,  Greja Verheijoen

发明人： Roel Daamen ,  Viet Nguyen Hoang ,  Romano Hoofman ,  Greja Verheijoen

IPC分类号： H01L21/768

CPC分类号： H01L21/7684 ,  H01L21/7688

摘要： The present invention relates to a method for fabrication of in-laid metal interconnects. The method comprises the steps of providing a substrate with a dielectric material (1) on top thereof, depositing a protection layer (2) on top of the dielectric material, depositing a sacrificial layer (7) on top of the protection layer, the sacrificial layer having a mechanical strength that is lower than the mechanical strength of the protection layer, making an opening (3) through the sacrificial layer, through the protection layer and into the dielectric material, depositing a barrier layer (4) in the opening and on the sacrificial layer, depositing metal material (5) on the barrier layer, the metal material filling the opening, removing portions of the metal material existing beyond the opening by means of polishing, and removing the barrier layer and the sacrificial layer in one polishing step.

摘要翻译： 本发明涉及一种内置金属互连的制造方法。 该方法包括以下步骤：在其顶部提供介电材料（1）的基底，在电介质材料的顶部上沉积保护层（2），在保护层的顶部上沉积牺牲层（7） 具有低于保护层的机械强度的机械强度的层，通过保护层形成通过牺牲层的开口（3）并进入电介质材料，在开口中沉积阻挡层（4） 牺牲层，在阻挡层上沉积金属材料（5），填充开口的金属材料，通过抛光去除存在于开口之外的金属材料的部分，以及在一个抛光步骤中去除阻挡层和牺牲层 。

公开(公告)号：US08534914B2

公开(公告)日：2013-09-17

申请号：US12863744

申请日：2009-01-27

申请人： Viet Nguyen Hoang ,  Radu Surdeanu ,  Pascal Bancken ,  Benoit Bataillou ,  David Van Steenwinckel

发明人： Viet Nguyen Hoang ,  Radu Surdeanu ,  Pascal Bancken ,  Benoit Bataillou ,  David Van Steenwinckel

IPC分类号： H05B33/08 ,  H05B37/02 ,  G01K7/01

CPC分类号： H05B33/0818 ,  G01K7/01 ,  H05B33/0866 ,  H05B33/089

摘要： A method of estimating the junction temperature of a light emitting diode comprises driving a forward bias current through the diode, the current comprising a square wave which toggles between high and low current values (Ihigh, llow), the high current value (lhigh) comprising an LED operation current, and the low current value (ILOW) comprising a non-zero measurement current. The forward bias voltage drop (Vf) is sampled and the forward bias voltage drop (Vflow) is determined at the measurement current (ILOW)—The temperature is derived from the determined forward bias voltage drop.

摘要翻译： 估计发光二极管的结温的方法包括驱动通过二极管的正向偏置电流，该电流包括在高电流值和低电流值（Ihigh，llow）之间切换的方波，高电流值（lhigh）包括 LED操作电流和包括非零测量电流的低电流值（ILOW）。 正向偏置电压降（Vf）被采样，并且在测量电流（ILOW）下确定正向偏置电压降（Vflow） - 温度是从确定的正向偏压电压降导出的。

公开(公告)号：US08471565B2

公开(公告)日：2013-06-25

申请号：US12876063

申请日：2010-09-03

申请人： Viet Nguyen Hoang ,  Pascal Bancken ,  Radu Surdeanu

发明人： Viet Nguyen Hoang ,  Pascal Bancken ,  Radu Surdeanu

IPC分类号： G01R31/00

CPC分类号： H05B33/0818 ,  G01R31/2635 ,  G01R31/2642 ,  H05B33/0851

摘要： A method of estimating the output light flux of a light emitting diode, comprises applying a drive current waveform to the LED over a period of time comprising a testing period. The forward voltage across the LED is monitored during the testing period, and the output light flux is estimated as a function of changes in the forward voltage.

摘要翻译： 一种估计发光二极管的输出光通量的方法包括在包括测试周期的时间段内向LED施加驱动电流波形。 在测试期间监控LED两端的正向电压，并将输出光通量估计为正向电压变化的函数。

公开(公告)号：US08217558B2

公开(公告)日：2012-07-10

申请号：US12910583

申请日：2010-10-22

申请人： Pascal Bancken ,  Viet Nguyen Hoang ,  Radu Surdeanu ,  Benoit Bataillou ,  David van Steenwinckel

发明人： Pascal Bancken ,  Viet Nguyen Hoang ,  Radu Surdeanu ,  Benoit Bataillou ,  David van Steenwinckel

IPC分类号： H01J7/24 ,  H01L33/00

CPC分类号： H01L33/642 ,  F21V29/70 ,  F21Y2115/10 ,  H01L33/483 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/00

摘要： Apparatus for regulating the temperature of a light emitting diode (LED). The apparatus includes a heat sink, an LED mount, and an LED mounted on the LED mount. The LED mount is configured to change shape in response to a change in temperature. The change in shape alters the position of the LED relative to the heat sink, for adjusting heat transfer between the LED and the heat sink. The LED mount may include a laminated portion such as a bi-metallic strip.

摘要翻译： 用于调节发光二极管（LED）的温度的装置。 该装置包括散热器，LED安装座和安装在LED安装座上的LED。 LED安装座被配置为响应于温度变化而改变形状。 形状的变化会改变LED相对于散热片的位置，以调节LED和散热片之间的热传递。 LED支架可以包括诸如双金属条的层压部分。

公开(公告)号：US20120001570A1

公开(公告)日：2012-01-05

申请号：US13257266

申请日：2010-02-25

申请人： Peter Hubertus Franciscus Deurenberg ,  Gert-Jan Koolen ,  Gian Hoogzaad ,  Radu Surdeanu ,  Pascal Bancken ,  Benoit Bataillou ,  Viet Nguyen Hoang

发明人： Peter Hubertus Franciscus Deurenberg ,  Gert-Jan Koolen ,  Gian Hoogzaad ,  Radu Surdeanu ,  Pascal Bancken ,  Benoit Bataillou ,  Viet Nguyen Hoang

IPC分类号： H05B37/02

CPC分类号： H05B33/086 ,  H05B33/0815 ,  H05B33/0848

摘要： A method is disclosed of controlling a LED, comprising driving the LED with a DC current for a first time, interrupting the DC current for a second time such that the first time and the second time sum to a period, determining at least one characteristic of the LED whilst the DC current is interrupted, and controlling the DC current during a subsequent period in dependence on the at least one characteristic. The invention thus benefits from the simplicity of DC operation. By operating at the LED in a DC mode, rather than say in a PWM mode, the requirement to be able to adjust the duty cycle is avoided. By including interruptions to the DC current, it is possible to utilise the LED itself to act as a sensor in order to determine a characteristic of the LED. The need for additional sensors is thereby avoided.

摘要翻译： 公开了一种控制LED的方法，包括第一次用DC电流驱动LED，第二次中断DC电流，使得第一时间和第二时间总和到一个周期，确定至少一个特性 所述LED在DC电流中断期间，并且根据所述至少一个特性在随后的时段期间控制所述DC电流。 因此，本发明由于DC操作的简单性而受益。 通过在DC模式下操作LED，而不是在PWM模式下说明，可以避免能够调整占空比的要求。 通过包含直流电流的中断，可以利用LED本身作为传感器，以便确定LED的特性。 从而避免了对附加传感器的需要。

公开(公告)号：US20090267234A1

公开(公告)日：2009-10-29

申请号：US12306032

申请日：2007-06-15

申请人： Viet Nguyen Hoang

发明人： Viet Nguyen Hoang

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L23/5283 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： The invention relates to a semiconductor device comprising a substrate (1) and at least one interconnect layer located at a surface of the substrate (1), the interconnect layer comprising a first wire (20″) and a second wire (20′) which are located in the interconnect layer, the first wire (20″) having a first thickness (T1) and the second wire (20′having a second thickness (T2) that is different from the first thickness, the thickness (T1,T2) being defined in a direction perpendicular to said surface. The invention further relates to a method of manufacturing a semiconductor device comprising a substrate (1) and an interconnect layer located at a surface of the substrate (1), the interconnect layer comprising a first wire (20″) and a second wire (20) which are located in the interconnect layer.

摘要翻译： 本发明涉及一种半导体器件，其包括基片（1）和位于基片（1）表面的至少一个互连层，所述互连层包括第一线（20“）和第二线（20'）， 它们位于互连层中，第一线（20“）具有第一厚度（T1）和第二线（20'具有不同于第一厚度的第二厚度（T2），厚度（T1， 本发明还涉及一种制造半导体器件的方法，所述半导体器件包括衬底（1）和位于所述衬底（1）的表面处的互连层，所述互连层包括 第一线（20“）和第二线（20），其位于互连层中。