公开(公告)号：US20070109861A1

公开(公告)日：2007-05-17

申请号：US11555676

申请日：2006-11-01

申请人： Shih-Chen Wang ,  Hsin-Ming Chen ,  Chun-Hung Lu ,  Ming-Chou Ho ,  Shih-Jye Shen ,  Ching-Hsiang Hsu

发明人： Shih-Chen Wang ,  Hsin-Ming Chen ,  Chun-Hung Lu ,  Ming-Chou Ho ,  Shih-Jye Shen ,  Ching-Hsiang Hsu

IPC分类号： G11C16/04

CPC分类号： G11C16/0475 ,  G11C16/0425 ,  G11C16/0466 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/6656 ,  H01L29/66659 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7835 ,  H01L29/7887 ,  H01L29/792 ,  H01L29/7923

摘要： A single-poly non-volatile memory cell that is fully compatible with nano-scale semiconductor manufacturing process is provided. The single-poly non-volatile memory cell includes an ion well, a gate formed on the ion well, a gate dielectric layer between the gate and the ion well, a dielectric stack layer on sidewalls of the gate, a source doping region and a drain doping region. The dielectric stack layer includes a first oxide layer deposited on the sidewalls of the gate and extends to the ion well, and a silicon nitride layer formed on the first oxide layer. The silicon nitride layer functions as a charge-trapping layer.

摘要翻译： 提供了与纳米级半导体制造工艺完全兼容的单一多晶非易失性存储单元。 单多晶非易失性存储单元包括离子阱，形成在离子阱上的栅极，栅极和离子阱之间的栅极电介质层，栅极侧壁上的电介质叠层，源极掺杂区和 漏极掺杂区域。 电介质堆叠层包括沉积在栅极的侧壁上并延伸到离子阱的第一氧化物层和形成在第一氧化物层上的氮化硅层。 氮化硅层用作电荷捕获层。

公开(公告)号：US20070103615A1

公开(公告)日：2007-05-10

申请号：US11595486

申请日：2006-11-10

申请人： Yung-Chiang Cheng ,  Hsin-Ming Chen

发明人： Yung-Chiang Cheng ,  Hsin-Ming Chen

IPC分类号： G02F1/136

CPC分类号： G02F1/1368 ,  G02F1/13624 ,  G02F2001/134345

摘要： An exemplary liquid crystal display (200) includes a plurality of gate lines (201), data lines (202), common lines (210), first pixel electrodes (204) and second pixel electrodes (214). Each of areas defined by one of the first pixel electrodes and an adjacent one of the second pixel electrodes is a pixel unit (208). Each pixel unit is driven by a first TFT (203) and a second TFT (213). The first thin film transistor and the second thin film transistor in each pixel unit are connected to a same one of the gate lines and a same one of the data lines, and to the first pixel electrode and the second pixel electrode respectively. A channel width/length ratio of the first thin film transistor is different from a channel width/length ratio of the second thin film transistor.

摘要翻译： 示例性液晶显示器（200）包括多条栅极线（201），数据线（202），公共线（210），第一像素电极（204）和第二像素电极（214）。 由第一像素电极之一和相邻的第二像素电极之一限定的区域是像素单元（208）。 每个像素单元由第一TFT（203）和第二TFT（213）驱动。 每个像素单元中的第一薄膜晶体管和第二薄膜晶体管分别连接到同一条栅极线和同一条数据线，分别连接到第一像素电极和第二像素电极。 第一薄膜晶体管的沟道宽度/长度比不同于第二薄膜晶体管的沟道宽度/长度比。

公开(公告)号：US20070089226A1

公开(公告)日：2007-04-26

申请号：US11257845

申请日：2005-10-25

申请人： Hsin-Ming Chen

发明人： Hsin-Ming Chen

IPC分类号： A61H35/00

CPC分类号： A47K7/08

摘要： A portable water therapy apparatus for the large intestine has a positioning pad, a controller, an inlet tube, an outlet tube, and a nozzle and a switch system. The controller comprises a filtering device, a heating device, a pressure control pump, and a switch system. The inlet tube has two ends, a first end is connected to the pressure control pump of the controller, and a second end is connected to a faucet, which eliminates the need to add water manually.

摘要翻译： 用于大肠的便携式水处理设备具有定位垫，控制器，入口管，出口管，喷嘴和开关系统。 控制器包括过滤装置，加热装置，压力控制泵和开关系统。 入口管有两个端部，第一端连接到控制器的压力控制泵，第二端连接到水龙头，这样无需手动加水。

公开(公告)号：US07172940B1

公开(公告)日：2007-02-06

申请号：US11162572

申请日：2005-09-15

申请人： Hsin-Ming Chen ,  Hai-Ming Lee ,  Shih-Jye Shen ,  Ching-Hsiang Hsu

发明人： Hsin-Ming Chen ,  Hai-Ming Lee ,  Shih-Jye Shen ,  Ching-Hsiang Hsu

IPC分类号： H01L21/8247

CPC分类号： H01L27/11568 ,  H01L27/105 ,  H01L27/11573 ,  H01L29/66833 ,  Y10S438/954

摘要： A method of fabricating a non-volatile memory based on SONOS is disclosed. By masking the peripheral circuit area with a reverse ONO photoresist layer, the residual ONO layer that is not covered by a gate within the memory array area is etched away to expose the substrate. After the etching of the ONO layer, a channel adjustment doping is carried out subsequently using the reverse ONO photoresist layer as an implant mask, thereby forming lightly doped regions next to the gate within the memory array area. Finally, the reverse ONO photoresist layer is then stripped.

摘要翻译： 公开了一种制造基于SONOS的非易失性存储器的方法。 通过用反向ONO光致抗蚀剂层掩蔽外围电路区域，蚀刻掉未被存储器阵列区域内的栅极覆盖的残余ONO层以露出衬底。 在ONO层的蚀刻之后，随后使用反向ONO光致抗蚀剂层作为注入掩模进行沟道调节掺杂，从而在存储器阵列区域内形成栅极旁边的轻掺杂区域。 最后，剥离反向ONO光致抗蚀剂层。

公开(公告)号：US20070019436A1

公开(公告)日：2007-01-25

申请号：US11491582

申请日：2006-07-24

申请人： Hsin-Ming Chen ,  Yu-Ju Hsu

发明人： Hsin-Ming Chen ,  Yu-Ju Hsu

IPC分类号： F21V7/04

CPC分类号： G02B6/0053 ,  G02B6/0038 ,  G02F1/133606 ,  G02F1/133611

摘要： An exemplary light guide plate (12) includes a substrate (120) having an emitting surface (124), and a plurality of parallel V-shaped grooves (126) provided at the emitting surface. Each of the V-shaped grooves maintains an oblique angle relative to a long side of the substrate, and the angle is in the range from 5° to 44.9°. An associated device employing the light guide plate can provide good viewing performance.

摘要翻译： 示例性导光板（12）包括具有发射表面（124）的基板（120）和设置在发射表面处的多个平行的V形凹槽（126）。 每个V形槽相对于基板的长边保持倾斜角度，角度在5°至44.9°的范围内。 使用导光板的相关装置可以提供良好的观看性能。

公开(公告)号：US07042538B2

公开(公告)日：2006-05-09

申请号：US10707258

申请日：2003-12-01

申请人： Hsin-Ming Chen

发明人： Hsin-Ming Chen

IPC分类号： G02F1/1335 ,  G02F1/1333 ,  H01L21/00

CPC分类号： G02F1/136209 ,  G02F1/133516 ,  G02F2001/136222

摘要： A color filter structure of a liquid crystal display (LCD) has a plurality of color filters coupling with each other disposed on a substrate. An overlapping region is positioned between adjacent color filters, and a surface of color filter in the overlapping region is substantially in a same level as a surface of the color filters outside the overlapping region.

摘要翻译： 液晶显示器（LCD）的滤色器结构具有设置在基板上的彼此耦合的多个滤色器。 重叠区域位于相邻的滤色器之间，并且重叠区域中的滤色器的表面基本上与重叠区域外的滤色器的表面相同。

公开(公告)号：US20060018161A1

公开(公告)日：2006-01-26

申请号：US10905736

申请日：2005-01-19

申请人： Hsin-Ming Chen ,  Shih-Chen Wang ,  Hong-Ping Tsai

发明人： Hsin-Ming Chen ,  Shih-Chen Wang ,  Hong-Ping Tsai

IPC分类号： G11C16/04

CPC分类号： G11C16/0441 ,  H01L27/115

摘要： An erasable programmable non-volatile memory cell encompasses an ion well; a first select transistor including a select gate, source/drain formed in the ion well, and a channel region formed between its source and drain; a first floating gate transistor having a drain, a source coupled to the drain of the first select transistor, a first floating gate channel region formed between its drain and source, and a common floating gate overlying the floating gate channel region; a second select transistor including a select gate, source/drain formed in the ion well, and a channel region formed between its source and drain; and a second floating gate transistor having a drain, a source coupled to the drain of the second select transistor, a second floating gate channel region formed between its drain and source, and the common floating gate overlying the second floating gate channel region.

摘要翻译： 可擦除可编程非易失性存储单元包含离子阱; 包括选择栅极的第一选择晶体管，形成在所述离子阱中的源极/漏极以及在其源极和漏极之间形成的沟道区域; 具有漏极的第一浮栅晶体管，耦合到所述第一选择晶体管的漏极的源极，形成在其漏源和源极之间的第一浮置栅极沟道区和覆盖所述浮置栅极沟道区的公共浮动栅; 包括选择栅极的第二选择晶体管，形成在离子阱中的源极/漏极，以及在其源极和漏极之间形成的沟道区域; 以及第二浮栅晶体管，其具有漏极，耦合到所述第二选择晶体管的漏极的源极，形成在其漏极和源极之间的第二浮置栅极沟道区域以及覆盖所述第二浮置栅极沟道区域的所述公共浮动栅极。

公开(公告)号：US20050282332A1

公开(公告)日：2005-12-22

申请号：US11161951

申请日：2005-08-23

申请人： Ching-Hsiang Hsu ,  Shih-Jye Shen ,  Hsin-Ming Chen ,  Hai-Ming Lee

发明人： Ching-Hsiang Hsu ,  Shih-Jye Shen ,  Hsin-Ming Chen ,  Hai-Ming Lee

IPC分类号： G11C11/34 ,  G11C16/04 ,  G11C16/10 ,  H01L21/336 ,  H01L21/8238 ,  H01L21/8246 ,  H01L27/108 ,  H01L27/115 ,  H01L29/76 ,  H01L29/792 ,  H01L29/94 ,  H01L31/119

CPC分类号： G11C16/0433 ,  G11C16/10 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/66833 ,  H01L29/792

摘要： A memory cell includes an N-type well, three P-type doped regions formed on the N-type well, a dielectric layer formed on the N-type well and between a first doped region and a second doped region of the three P-type doped regions, a first gate formed on the dielectric layer, a charge storage structure formed on the N-type well and between the second doped region and a third doped region of the three P-type doped regions, and a second gate formed on the charge storage structure. Data is stored in the memory cell by injecting electrons based on the channel-hot-hole induced hot-electron injection mechanism, the band-to-band tunneling induced electron injection mechanism and the Fowler-Nordheim tunneling mechanism. Data is erased from the memory cell by ejecting electrons based on the Fowler-Nordheim tunneling mechanism. Whether data is stored in the charge storage structure or not can be distinguished by read operation.

摘要翻译： 存储单元包括N型阱，形成在N型阱上的三个P型掺杂区，形成在N型阱上的介质层，以及在三个P型掺杂区的第三掺杂区和第三掺杂区之间， 形成在电介质层上的第一栅极，形成在N型阱上的电荷存储结构，以及形成在三个P型掺杂区域的第二掺杂区域和第三掺杂区域之间的电荷存储结构， 电荷存储结构。 基于通道 - 热孔感应的热电子注入机制，带 - 带隧道诱导电子注入机制和Fowler-Nordheim隧道机制，通过注入电子将数据存储在存储单元中。 基于Fowler-Nordheim隧道机制，通过弹出电子从存储器单元擦除数据。 数据是否存储在电荷存储结构中是否可以通过读取操作进行区分。

公开(公告)号：US06975545B2

公开(公告)日：2005-12-13

申请号：US10707700

申请日：2004-01-05

申请人： Ching-Hsiang Hsu ,  Shih-Jye Shen ,  Hsin-Ming Chen ,  Hai-Ming Lee

发明人： Ching-Hsiang Hsu ,  Shih-Jye Shen ,  Hsin-Ming Chen ,  Hai-Ming Lee

IPC分类号： G11C16/04 ,  G11C16/10 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76 ,  H01L29/792

CPC分类号： H01L27/11568 ,  G11C16/0466 ,  G11C16/10 ,  H01L27/115 ,  H01L29/7923

摘要： A memory cell includes an N-type well, three P-type doped regions, a first stacked dielectric layer, a first gate, a second stacked dielectric layer, and a second gate. The three P-type doped regions are formed on the N-well. The first dielectric stack layer is formed on the N-type well and between the first doped region and the second doped region from among the three P-type doped regions. The first gate is formed on the first stacked dielectric layer. The second stacked dielectric layer is formed on the N-type well and between the second doped region and the third doped region from among the three P-type doped regions. The second gate is formed on the second stacked dielectric layer.

摘要翻译： 存储单元包括N型阱，三个P型掺杂区，第一层叠电介质层，第一栅极，第二堆叠电介质层和第二栅极。 在N阱上形成三个P型掺杂区域。 在三个P型掺杂区域中，第一电介质叠层形成在N型阱上，并且在第一掺杂区和第二掺杂区之间。 第一栅极形成在第一堆叠电介质层上。 在三个P型掺杂区域中，第二层叠电介质层形成在N型阱上，并且在第二掺杂区域和第三掺杂区域之间。 第二栅极形成在第二堆叠电介质层上。

公开(公告)号：US06816210B2

公开(公告)日：2004-11-09

申请号：US10249651

申请日：2003-04-29

申请人： Hsin-Ming Chen

发明人： Hsin-Ming Chen

IPC分类号： G02F1136

CPC分类号： G02F1/13394 ,  G02F1/134336

摘要： A method for forming a self-aligned pixel electrode of a LCD is introduced. The LCD includes a substrate having a plurality of adjacent pixel electrode regions. A joint side is positioned between each pixel electrode region and its adjacent pixel electrode regions. First, a spacer is formed on the joint sides of the pixel electrode regions, and the spacer has an undercut profile. Then, a transparent conductive layer is formed on the substrate, and the transparent conductive layer that covers the pixel electrode regions is separated from the spacer to form a self-aligned pixel electrode.

摘要翻译： 引入了用于形成LCD的自对准像素电极的方法。 LCD包括具有多个相邻像素电极区域的基板。 接合侧位于每个像素电极区域和其相邻的像素电极区域之间。 首先，在像素电极区域的接合侧形成间隔物，并且间隔物具有底切轮廓。 然后，在基板上形成透明导电层，覆盖像素电极区域的透明导电层与间隔物分离，形成自对准像素电极。